[PATCH] Converting mmio to port io in userspace for IA64

[PATCH] Converting mmio to port io in userspace for IA64

[Zhang, Xiantao]

[-- Attachment #1: Type: text/plain, Size: 3174 bytes --]

From: Zhang Xiantao <xiantao.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
Date: Thu, 31 Jan 2008 09:06:21 +0800
Subject: [PATCH] kvm: qemu: Covert the mmio address space to port io in
userspace.

IA64 also have no port io, but chipset is responsible for converting
some mmio to port io for keeping compatibility with legacy deviceS.

Signed-off-by: Zhang Xiantao <xiantao.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
---
 qemu/hw/ipf.c |   60
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 60 insertions(+), 0 deletions(-)

diff --git a/qemu/hw/ipf.c b/qemu/hw/ipf.c
index b1c1389..bbce0c5 100644
--- a/qemu/hw/ipf.c
+++ b/qemu/hw/ipf.c
@@ -56,6 +56,60 @@ static fdctrl_t *floppy_controller;
 static RTCState *rtc_state;
 static PCIDevice *i440fx_state;
 
+#define TO_LEGACY_IO(addr)  (((addr&0x3ffffff) >> 12 << 2)|((addr) &
0x3))
+static void ipf_legacy_io_writeb(void *opaque, target_phys_addr_t addr,
+				 uint32_t val) {
+	uint32_t port = TO_LEGACY_IO(addr);
+	cpu_outb(0, port, val);
+}
+
+static void ipf_legacy_io_writew(void *opaque, target_phys_addr_t addr,
+				 uint32_t val) {
+	uint32_t port = TO_LEGACY_IO(addr);
+
+	cpu_outw(0, port, val);
+}
+
+static void ipf_legacy_io_writel(void *opaque, target_phys_addr_t addr,
+				 uint32_t val) {
+	uint32_t port = TO_LEGACY_IO(addr);
+
+	cpu_outl(0, port, val);
+}
+
+static uint32_t ipf_legacy_io_readb(void *opaque, target_phys_addr_t
addr)
+{
+	uint32_t port = TO_LEGACY_IO(addr);
+
+	return cpu_inb(0, port); 
+}
+
+static uint32_t ipf_legacy_io_readw(void *opaque, target_phys_addr_t
addr)
+{
+	uint32_t port = TO_LEGACY_IO(addr);
+
+	return cpu_inw(0, port); 
+}
+
+static uint32_t ipf_legacy_io_readl(void *opaque, target_phys_addr_t
addr)
+{
+	uint32_t port = TO_LEGACY_IO(addr);
+
+	return cpu_inl(0, port); 
+}
+
+static CPUReadMemoryFunc *ipf_legacy_io_read[3] = {
+    ipf_legacy_io_readb,
+    ipf_legacy_io_readw,
+    ipf_legacy_io_readl,
+};
+
+static CPUWriteMemoryFunc *ipf_legacy_io_write[3] = {
+    ipf_legacy_io_writeb,
+    ipf_legacy_io_writew,
+    ipf_legacy_io_writel,
+};
+
 static void pic_irq_request(void *opaque, int irq, int level)
 {
 	fprintf(stderr,"pic_irq_request called!\n");
@@ -333,6 +387,7 @@ static void ipf_init1(ram_addr_t ram_size, int
vga_ram_size,
     qemu_irq *i8259;
     int page_size;
     int index;
+    unsigned long ipf_legacy_io_base, ipf_legacy_io_mem;
     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
     BlockDriverState *fd[MAX_FD];
 
@@ -447,6 +502,11 @@ static void ipf_init1(ram_addr_t ram_size, int
vga_ram_size,
 		kvm_ia64_build_hob(ram_size + above_4g_mem_size,
smp_cpus, fw_start);
 	}
 #endif
+    /*Register legacy io address space, size:64M*/
+    ipf_legacy_io_base = 0xE0000000;
+    ipf_legacy_io_mem = cpu_register_io_memory(0, ipf_legacy_io_read,
+						ipf_legacy_io_write,
NULL);
+    cpu_register_physical_memory(ipf_legacy_io_base, 64*1024*1024,
ipf_legacy_io_mem);
 
     cpu_irq = qemu_allocate_irqs(pic_irq_request, first_cpu, 1);
     i8259 = i8259_init(cpu_irq[0]);
-- 
1.5.2

[-- Attachment #2: 0001-kvm-qemu-Covert-the-mmio-address-space-to-port-io.patch --]
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From debc3eb3c1f082de28351c3631a86e0eeff75f8a Mon Sep 17 00:00:00 2001
From: Zhang Xiantao <xiantao.zhang@intel.com>
Date: Thu, 31 Jan 2008 09:06:21 +0800
Subject: [PATCH] kvm: qemu: Covert the mmio address space to port io in userspace.

IA64 also have no port io, but chipset is responsible for converting
some mmio to port io for keeping compatibility with legacy device.

Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com>
---
 qemu/hw/ipf.c |   60 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 60 insertions(+), 0 deletions(-)

diff --git a/qemu/hw/ipf.c b/qemu/hw/ipf.c
index b1c1389..bbce0c5 100644
--- a/qemu/hw/ipf.c
+++ b/qemu/hw/ipf.c
@@ -56,6 +56,60 @@ static fdctrl_t *floppy_controller;
 static RTCState *rtc_state;
 static PCIDevice *i440fx_state;
 
+#define TO_LEGACY_IO(addr)  (((addr&0x3ffffff) >> 12 << 2)|((addr) & 0x3))
+static void ipf_legacy_io_writeb(void *opaque, target_phys_addr_t addr,
+				 uint32_t val) {
+	uint32_t port = TO_LEGACY_IO(addr);
+	cpu_outb(0, port, val);
+}
+
+static void ipf_legacy_io_writew(void *opaque, target_phys_addr_t addr,
+				 uint32_t val) {
+	uint32_t port = TO_LEGACY_IO(addr);
+
+	cpu_outw(0, port, val);
+}
+
+static void ipf_legacy_io_writel(void *opaque, target_phys_addr_t addr,
+				 uint32_t val) {
+	uint32_t port = TO_LEGACY_IO(addr);
+
+	cpu_outl(0, port, val);
+}
+
+static uint32_t ipf_legacy_io_readb(void *opaque, target_phys_addr_t addr)
+{
+	uint32_t port = TO_LEGACY_IO(addr);
+
+	return cpu_inb(0, port); 
+}
+
+static uint32_t ipf_legacy_io_readw(void *opaque, target_phys_addr_t addr)
+{
+	uint32_t port = TO_LEGACY_IO(addr);
+
+	return cpu_inw(0, port); 
+}
+
+static uint32_t ipf_legacy_io_readl(void *opaque, target_phys_addr_t addr)
+{
+	uint32_t port = TO_LEGACY_IO(addr);
+
+	return cpu_inl(0, port); 
+}
+
+static CPUReadMemoryFunc *ipf_legacy_io_read[3] = {
+    ipf_legacy_io_readb,
+    ipf_legacy_io_readw,
+    ipf_legacy_io_readl,
+};
+
+static CPUWriteMemoryFunc *ipf_legacy_io_write[3] = {
+    ipf_legacy_io_writeb,
+    ipf_legacy_io_writew,
+    ipf_legacy_io_writel,
+};
+
 static void pic_irq_request(void *opaque, int irq, int level)
 {
 	fprintf(stderr,"pic_irq_request called!\n");
@@ -333,6 +387,7 @@ static void ipf_init1(ram_addr_t ram_size, int vga_ram_size,
     qemu_irq *i8259;
     int page_size;
     int index;
+    unsigned long ipf_legacy_io_base, ipf_legacy_io_mem;
     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
     BlockDriverState *fd[MAX_FD];
 
@@ -447,6 +502,11 @@ static void ipf_init1(ram_addr_t ram_size, int vga_ram_size,
 		kvm_ia64_build_hob(ram_size + above_4g_mem_size, smp_cpus, fw_start);
 	}
 #endif
+    /*Register legacy io address space, size:64M*/
+    ipf_legacy_io_base = 0xE0000000;
+    ipf_legacy_io_mem = cpu_register_io_memory(0, ipf_legacy_io_read,
+						ipf_legacy_io_write, NULL);
+    cpu_register_physical_memory(ipf_legacy_io_base, 64*1024*1024, ipf_legacy_io_mem);
 
     cpu_irq = qemu_allocate_irqs(pic_irq_request, first_cpu, 1);
     i8259 = i8259_init(cpu_irq[0]);
-- 
1.5.2


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Re: [PATCH] Converting mmio to port io in userspace for IA64

[Avi Kivity]

Zhang, Xiantao wrote:
> From: Zhang Xiantao <xiantao.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
> Date: Thu, 31 Jan 2008 09:06:21 +0800
> Subject: [PATCH] kvm: qemu: Covert the mmio address space to port io in
> userspace.
>
> IA64 also have no port io, but chipset is responsible for converting
> some mmio to port io for keeping compatibility with legacy deviceS.
> @@ -56,6 +56,60 @@ static fdctrl_t *floppy_controller;
>  static RTCState *rtc_state;
>  static PCIDevice *i440fx_state;
>  
> +#define TO_LEGACY_IO(addr)  (((addr&0x3ffffff) >> 12 << 2)|((addr) &
> 0x3))
>   

Please change to a function.  Other than that, patch looks good.


-- 
error compiling committee.c: too many arguments to function


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Re: [PATCH] Converting mmio to port io in userspace for IA64

[Zhang, Xiantao]

[-- Attachment #1: Type: text/plain, Size: 3502 bytes --]

Avi Kivity wrote:
> Zhang, Xiantao wrote:
>> 
>> +#define TO_LEGACY_IO(addr)  (((addr&0x3ffffff) >> 12 << 2)|((addr)
>> & 0x3)) 
>> 
> 
> Please change to a function.  Other than that, patch looks good.
Thanks ! Attached. :)
Xiantao 

From: Zhang Xiantao <xiantao.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
Date: Thu, 31 Jan 2008 15:35:10 +0800
Subject: [PATCH] kvm: qemu: Covert the mmio address space to port io in
userspace.

IA64 also have no port io, but chipset is responsible for converting
some mmio to port io for keeping compatibility with legacy device.
Signed-off-by: Xiantao Zhang <xiantao.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
---
 qemu/hw/ipf.c |   64
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 64 insertions(+), 0 deletions(-)

diff --git a/qemu/hw/ipf.c b/qemu/hw/ipf.c
index b1c1389..8769208 100644
--- a/qemu/hw/ipf.c
+++ b/qemu/hw/ipf.c
@@ -56,6 +56,64 @@ static fdctrl_t *floppy_controller;
 static RTCState *rtc_state;
 static PCIDevice *i440fx_state;
 
+static uint32_t ipf_to_legacy_io(target_phys_addr_t addr)
+{
+	return (uint32_t)(((addr&0x3ffffff) >> 12 << 2)|((addr) & 0x3));
+}
+
+static void ipf_legacy_io_writeb(void *opaque, target_phys_addr_t addr,
+				 uint32_t val) {
+	uint32_t port = ipf_to_legacy_io(addr);
+	cpu_outb(0, port, val);
+}
+
+static void ipf_legacy_io_writew(void *opaque, target_phys_addr_t addr,
+				 uint32_t val) {
+	uint32_t port = ipf_to_legacy_io(addr);
+
+	cpu_outw(0, port, val);
+}
+
+static void ipf_legacy_io_writel(void *opaque, target_phys_addr_t addr,
+				 uint32_t val) {
+	uint32_t port = ipf_to_legacy_io(addr);
+
+	cpu_outl(0, port, val);
+}
+
+static uint32_t ipf_legacy_io_readb(void *opaque, target_phys_addr_t
addr)
+{
+	uint32_t port = ipf_to_legacy_io(addr);
+
+	return cpu_inb(0, port); 
+}
+
+static uint32_t ipf_legacy_io_readw(void *opaque, target_phys_addr_t
addr)
+{
+	uint32_t port = ipf_to_legacy_io(addr);
+
+	return cpu_inw(0, port); 
+}
+
+static uint32_t ipf_legacy_io_readl(void *opaque, target_phys_addr_t
addr)
+{
+	uint32_t port = ipf_to_legacy_io(addr);
+
+	return cpu_inl(0, port); 
+}
+
+static CPUReadMemoryFunc *ipf_legacy_io_read[3] = {
+    ipf_legacy_io_readb,
+    ipf_legacy_io_readw,
+    ipf_legacy_io_readl,
+};
+
+static CPUWriteMemoryFunc *ipf_legacy_io_write[3] = {
+    ipf_legacy_io_writeb,
+    ipf_legacy_io_writew,
+    ipf_legacy_io_writel,
+};
+
 static void pic_irq_request(void *opaque, int irq, int level)
 {
 	fprintf(stderr,"pic_irq_request called!\n");
@@ -333,6 +391,7 @@ static void ipf_init1(ram_addr_t ram_size, int
vga_ram_size,
     qemu_irq *i8259;
     int page_size;
     int index;
+    unsigned long ipf_legacy_io_base, ipf_legacy_io_mem;
     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
     BlockDriverState *fd[MAX_FD];
 
@@ -447,6 +506,11 @@ static void ipf_init1(ram_addr_t ram_size, int
vga_ram_size,
 		kvm_ia64_build_hob(ram_size + above_4g_mem_size,
smp_cpus, fw_start);
 	}
 #endif
+    /*Register legacy io address space, size:64M*/
+    ipf_legacy_io_base = 0xE0000000;
+    ipf_legacy_io_mem = cpu_register_io_memory(0, ipf_legacy_io_read,
+						ipf_legacy_io_write,
NULL);
+    cpu_register_physical_memory(ipf_legacy_io_base, 64*1024*1024,
ipf_legacy_io_mem);
 
     cpu_irq = qemu_allocate_irqs(pic_irq_request, first_cpu, 1);
     i8259 = i8259_init(cpu_irq[0]);
-- 
1.5.2

[-- Attachment #2: 0001-kvm-qemu-Covert-the-mmio-address-space-to-port-io.patch --]
[-- Type: application/octet-stream, Size: 3156 bytes --]

From f9a4ff72043827119a26f58f4b884395bd86676d Mon Sep 17 00:00:00 2001
From: Zhang Xiantao <xiantao.zhang@intel.com>
Date: Thu, 31 Jan 2008 15:35:10 +0800
Subject: [PATCH] kvm: qemu: Covert the mmio address space to port io in userspace.

IA64 also have no port io, but chipset is responsible for converting
some mmio to port io for keeping compatibility with legacy device.
Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com>
---
 qemu/hw/ipf.c |   64 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 64 insertions(+), 0 deletions(-)

diff --git a/qemu/hw/ipf.c b/qemu/hw/ipf.c
index b1c1389..8769208 100644
--- a/qemu/hw/ipf.c
+++ b/qemu/hw/ipf.c
@@ -56,6 +56,64 @@ static fdctrl_t *floppy_controller;
 static RTCState *rtc_state;
 static PCIDevice *i440fx_state;
 
+static uint32_t ipf_to_legacy_io(target_phys_addr_t addr)
+{
+	return (uint32_t)(((addr&0x3ffffff) >> 12 << 2)|((addr) & 0x3));
+}
+
+static void ipf_legacy_io_writeb(void *opaque, target_phys_addr_t addr,
+				 uint32_t val) {
+	uint32_t port = ipf_to_legacy_io(addr);
+	cpu_outb(0, port, val);
+}
+
+static void ipf_legacy_io_writew(void *opaque, target_phys_addr_t addr,
+				 uint32_t val) {
+	uint32_t port = ipf_to_legacy_io(addr);
+
+	cpu_outw(0, port, val);
+}
+
+static void ipf_legacy_io_writel(void *opaque, target_phys_addr_t addr,
+				 uint32_t val) {
+	uint32_t port = ipf_to_legacy_io(addr);
+
+	cpu_outl(0, port, val);
+}
+
+static uint32_t ipf_legacy_io_readb(void *opaque, target_phys_addr_t addr)
+{
+	uint32_t port = ipf_to_legacy_io(addr);
+
+	return cpu_inb(0, port); 
+}
+
+static uint32_t ipf_legacy_io_readw(void *opaque, target_phys_addr_t addr)
+{
+	uint32_t port = ipf_to_legacy_io(addr);
+
+	return cpu_inw(0, port); 
+}
+
+static uint32_t ipf_legacy_io_readl(void *opaque, target_phys_addr_t addr)
+{
+	uint32_t port = ipf_to_legacy_io(addr);
+
+	return cpu_inl(0, port); 
+}
+
+static CPUReadMemoryFunc *ipf_legacy_io_read[3] = {
+    ipf_legacy_io_readb,
+    ipf_legacy_io_readw,
+    ipf_legacy_io_readl,
+};
+
+static CPUWriteMemoryFunc *ipf_legacy_io_write[3] = {
+    ipf_legacy_io_writeb,
+    ipf_legacy_io_writew,
+    ipf_legacy_io_writel,
+};
+
 static void pic_irq_request(void *opaque, int irq, int level)
 {
 	fprintf(stderr,"pic_irq_request called!\n");
@@ -333,6 +391,7 @@ static void ipf_init1(ram_addr_t ram_size, int vga_ram_size,
     qemu_irq *i8259;
     int page_size;
     int index;
+    unsigned long ipf_legacy_io_base, ipf_legacy_io_mem;
     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
     BlockDriverState *fd[MAX_FD];
 
@@ -447,6 +506,11 @@ static void ipf_init1(ram_addr_t ram_size, int vga_ram_size,
 		kvm_ia64_build_hob(ram_size + above_4g_mem_size, smp_cpus, fw_start);
 	}
 #endif
+    /*Register legacy io address space, size:64M*/
+    ipf_legacy_io_base = 0xE0000000;
+    ipf_legacy_io_mem = cpu_register_io_memory(0, ipf_legacy_io_read,
+						ipf_legacy_io_write, NULL);
+    cpu_register_physical_memory(ipf_legacy_io_base, 64*1024*1024, ipf_legacy_io_mem);
 
     cpu_irq = qemu_allocate_irqs(pic_irq_request, first_cpu, 1);
     i8259 = i8259_init(cpu_irq[0]);
-- 
1.5.2


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Re: [PATCH] Converting mmio to port io in userspace for IA64

[Avi Kivity]

Zhang, Xiantao wrote:
> Avi Kivity wrote:
>   
>> Zhang, Xiantao wrote:
>>     
>>> +#define TO_LEGACY_IO(addr)  (((addr&0x3ffffff) >> 12 << 2)|((addr)
>>> & 0x3)) 
>>>
>>>       
>> Please change to a function.  Other than that, patch looks good.
>>     
> Thanks ! Attached. :)
> Xiantao 
>
> From: Zhang Xiantao <xiantao.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
> Date: Thu, 31 Jan 2008 15:35:10 +0800
> Subject: [PATCH] kvm: qemu: Covert the mmio address space to port io in
> userspace.
>
> IA64 also have no port io, but chipset is responsible for converting
> some mmio to port io for keeping compatibility with legacy device.
> Signed-off-by: Xiantao Zhang <xiantao.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
>   

Applied, thanks.

-- 
error compiling committee.c: too many arguments to function


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