From mboxrd@z Thu Jan 1 00:00:00 1970 From: Avi Kivity Subject: Re: [PATCH 3/3] KVM: SVM: enable LBRV virtualization Date: Wed, 13 Feb 2008 11:50:58 +0200 Message-ID: <47B2BD82.1050800@qumranet.com> References: <1202830030-16023-1-git-send-email-joerg.roedel@amd.com> <1202830030-16023-4-git-send-email-joerg.roedel@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: kvm-devel@lists.sourceforge.net, Markus Rechberger To: Joerg Roedel Return-path: In-Reply-To: <1202830030-16023-4-git-send-email-joerg.roedel@amd.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: kvm-devel-bounces@lists.sourceforge.net Errors-To: kvm-devel-bounces@lists.sourceforge.net List-Id: kvm.vger.kernel.org Joerg Roedel wrote: > @@ -1224,6 +1261,15 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data) > if (data != 0) > goto unhandled; > break; > + case MSR_IA32_DEBUGCTLMSR: > + svm->vmcb->save.dbgctl = data; > + if (!svm_has(SVM_FEATURE_LBRV)) > + break; > + if (data & (1ULL<<0)) > + svm_enable_lbrv(svm); > + else > + svm_disable_lbrv(svm); > + break; > default: > unhandled: > return kvm_set_msr_common(vcpu, ecx, data); > This still has the same issue as the previous patchset: if the guest enables some other bit in MSR_IA32_DEBUCTLMSR, we silently ignore it. We should either pr_unimpl() on such bits or not handle them (ultimately injecting a #GP). Also, I'd like a simple patch for 2.6.25 to add support for Windows x86 on AMD. So if the first patch in the series can add support for the bits that Windows sets in MSR_IA32_DEBUGCTLMSR (I imagine it just writes zero?) then I can queue that for 2.6.25 and the rest for 2.6.26. -- Any sufficiently difficult bug is indistinguishable from a feature. ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/