Re: [patch 2/5] KVM: hypercall based pte updates and TLB flushes

[Avi Kivity <avi@qumranet.com>]

Marcelo Tosatti wrote:
> Hypercall based pte updates are faster than faults, and also allow use
> of the lazy MMU mode to batch operations.
>
> Don't report the feature if two dimensional paging is enabled.
>
> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
> Cc: Anthony Liguori <aliguori@us.ibm.com>
>  
> +static int kvm_hypercall_mmu_write(struct kvm_vcpu *vcpu, gva_t addr,
> +				   unsigned long size, unsigned long a0,
> +				   unsigned long a1)
> +{
> +	gpa_t gpa;
> +	u64 value;
> +
> +	if (mmu_topup_memory_caches(vcpu))
> +		return -KVM_EFAULT;
> +
> +	down_read(&vcpu->kvm->slots_lock);
> +	gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
> +	up_read(&vcpu->kvm->slots_lock);
> +
> +	if (gpa == UNMAPPED_GVA)
> +		return -KVM_EFAULT;
> +	if (size == 1) {
> +		if (!emulator_write_phys(vcpu, gpa, &a0, sizeof(a0)))
> +			return -KVM_EFAULT;
> +	} else if (size == 2) {
> +		if (!is_long_mode(vcpu) && is_pae(vcpu))
> +			value = (u64)a1 << 32 | a0;
> +		else
> +			value = a0;
> +		if (!emulator_write_phys(vcpu, gpa, &value, sizeof(value)))
> +			return -KVM_EFAULT;
>   

The size logic can be simplified if it is redefined to mean "size in 
guest longs".  Actually, it can be inferred from the guest mode, and a1 
is only required iff the guest is a 32-bit pae.


-- 
Any sufficiently difficult bug is indistinguishable from a feature.


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