Re: [PATCH]: Fix MSR_K7_EVNTSEL{0,3} for SVM

Avi Kivity
2008-04-25T07:30:06Z

Chris Lalancette wrote:
> Avi Kivity wrote:
>
>> Now it uses %rsi instead of %esi, and any junk in the upper bits will
>> cause the ja to be taken.
>>
>> We need to get a reduced testcase to the gcc folks, this is a serious
>> bug. Any changes in the code to work around this would be fragile.
>>
>>
>
> Avi,
> I've now filed a bug in the upstream gcc database:
>
> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36040
>
> And I came up with a reduced test case, available here:
>
> http://people.redhat.com/clalance/rsi-test-case.tar.bz2
>
> If I compile the code in the above and look at the disassembly, it shows the
> problem; however, I can't reproduce the bug by actually running the code. I
> suspect the %rsi register is always 0 when we start in this userland code, so I
> never run into the bogus ja, but I just thought I'd mention it.
>
>

Hmm, looking back at the dump:

> 1811: 8d 86 00 00 ff 3f lea 0x3fff0000(%rsi),%eax
> 1817: 83 f8 03 cmp $0x3,%eax
> 181a: 0f 87 e2 01 00 00 ja 1a02 <svm_set_msr+0x27f>

So while gcc is using %rsi, it loads the result back into %eax, which
has the effect of dropping back into 32-bits. So looks like gcc was
right here. Sorry for spreading confusion and apologies to gcc.

--
Do not meddle in the internals of kernels, for they are subtle and quick to panic.