Re: [kvm-ia64-devel] IRQ assignment

[Avi Kivity <avi@qumranet.com>]

Xu, Anthony wrote:
>> Allowing qemu to use all ioapic interrupt pins will reduce interrupt
>> sharing on x86, which is a good thing, so I prefer the first option
>> too. 
>>     
>
>
> Thanks for your support, I preper option #1,
> Any suggestion for the mapping from BDF to irq.
>
> In XEN both in IA64/IA32,
>
> BIOS provides a 48 pin IOAPIC ( usually it is 24) to reduce irq sharing.
> 0~15 are reserved for legacy devices.
> Pci devices use 16~47,
> The mapping is like
>   ((bdf >> 3) *4) %(48-16) + 16
> Means every pci interrup pin( irqA, irqB, irqC, irqD) of every pci
> device use different irq pin of IOAPIC if number of pci devices is less
> than 8.
> I think it can avoid interrupt sharing in most case.
>
>   

With 24 free pins, that's fine.  With 8 free pins, less so.  We'll need 
to mix in more high bits.

I guess we need to increase the number of pins on x86 too.

> If use this method, we can share same IA64 guest BIOS between XEN/IA64
> and KVM/IA64.
>   

You can use this method for ia64, and we'll have a different function 
for x86 (perhaps two functions, if we later increase the number of pins 
to 48 (or even more); the DSDT will need to select the appropriate 
routing table according to what's present on the hardware).

-- 
error compiling committee.c: too many arguments to function