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From: Alexander Graf <agraf@suse.de>
To: Alexander Graf <agraf@suse.de>
Cc: Avi Kivity <avi@qumranet.com>,
	"Xu, Anthony" <anthony.xu@intel.com>, Jes Sorensen <jes@sgi.com>,
	kvm@vger.kernel.org, kvm-ia64@vger.kernel.org
Subject: Re: [PATCH] kvm-ia64 irq assignment 1/2  kernel
Date: Mon, 09 Jun 2008 11:16:26 +0200	[thread overview]
Message-ID: <484CF4EA.1030406@suse.de> (raw)
In-Reply-To: <484CF0AA.7010302@suse.de>

Alexander Graf wrote:
> Avi Kivity wrote:
>> Xu, Anthony wrote:
>>> In kvm-ia64, we use the same guest firmware (GFW)as in Xen, GFW uses 
>>> PRT to present PCI interrupt routing, all PCI devices'
>>> interrupt pins
>>> connect to IOAPIC, which doesn't match with kvm-ia64 Qemu PCI interrupt
>>> routing.
>>>
>>> This patch modify Qemu PCI interupt routing code to match with GFW, 
>>> Then PCI devices in qemu can work in kvm-ia64, for exmaple, NIC
>>>
>>>
>>> Signed-off-by: Anthony Xu < anthony.xu@intel.com >
>>>
>>>
>>> diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c
>>> index 99a1736..80c116c 100644
>>> --- a/virt/kvm/ioapic.c
>>> +++ b/virt/kvm/ioapic.c
>>> @@ -272,7 +272,11 @@ void kvm_ioapic_set_irq(struct kvm_ioapic *ioapic,
>>> int irq, int level)
>>>
>>>         if (irq >= 0 && irq < IOAPIC_NUM_PINS) {
>>>                 entry = ioapic->redirtbl[irq];
>>> -               level ^= entry.fields.polarity;
>>> +// polarity of all devices in qemu is active high
>>> +//  regardless of ioapic setting
>>> +
>>> +//             level ^= entry.fields.polarity;
>>> +
>>>   
>>
>> There are two errors in this patch:
>>
>> - kvm is not there just for qemu; it should be possible to use kvm 
>> with some other userspace, which would assume that kvm correctly 
>> emulates ioapic polarity
>> - you are modifying shared code and so affect x86 as well
>
> Apparently this is broken on x86 too. I was just trying this patch 
> with Mac OS X as target and magically the in-kernel APIC starts 
> working, so I guess something is going wrong already here.
> Btw, according to the ACPI tables, all PCI interrupts are currently 
> defined Active-Low.

Sorry, ActiveHigh that is. Nevertheless I am having trouble with this 
since the very first time I used osx inside KVM. Does PCI allow Active

 > Interrupt (, Level, ActiveHigh, Shared)

According to the PCI 3.0 Spec, "Interrupts on PCI are optional and 
defined as 'level sensitive,' asserted low (negative true)".

Alex

  reply	other threads:[~2008-06-09  9:18 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-06-06 15:58 [PATCH] kvm-ia64 irq assignment 1/2 kernel Xu, Anthony
2008-06-06 19:58 ` Avi Kivity
2008-06-09  8:58   ` Alexander Graf
2008-06-09  9:16     ` Alexander Graf [this message]
2008-06-12 12:24       ` Avi Kivity
2008-06-10  6:33   ` Xu, Anthony
2008-06-10  7:25     ` Alexander Graf
2008-06-10  7:57       ` [RFC]RE: " Xu, Anthony
2008-06-11 14:24         ` Alexander Graf
2008-06-11 16:02           ` Marcelo Tosatti
2008-06-12 16:15             ` Xu, Anthony
2008-06-14 22:58               ` Marcelo Tosatti
2008-06-16  1:13                 ` Xu, Anthony
2008-07-02  9:11                   ` Jes Sorensen
2008-07-03  1:22                     ` Xu, Anthony
2008-06-12 16:08           ` Xu, Anthony
2008-06-11 16:16         ` Marcelo Tosatti
2008-06-12 16:19           ` Xu, Anthony
2008-06-12 12:34         ` Avi Kivity
2008-06-12 16:20           ` Xu, Anthony
2008-06-12 12:30     ` Avi Kivity

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