From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alexander Graf Subject: Re: [PATCH] kvm-ia64 irq assignment 1/2 kernel Date: Mon, 09 Jun 2008 11:16:26 +0200 Message-ID: <484CF4EA.1030406@suse.de> References: <51CFAB8CB6883745AE7B93B3E084EBE201CC875F@pdsmsx412.ccr.corp.intel.com> <484996EE.8060600@qumranet.com> <484CF0AA.7010302@suse.de> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: Avi Kivity , "Xu, Anthony" , Jes Sorensen , kvm@vger.kernel.org, kvm-ia64@vger.kernel.org To: Alexander Graf Return-path: Received: from mx2.suse.de ([195.135.220.15]:51753 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756218AbYFIJSc (ORCPT ); Mon, 9 Jun 2008 05:18:32 -0400 In-Reply-To: <484CF0AA.7010302@suse.de> Sender: kvm-owner@vger.kernel.org List-ID: Alexander Graf wrote: > Avi Kivity wrote: >> Xu, Anthony wrote: >>> In kvm-ia64, we use the same guest firmware (GFW)as in Xen, GFW uses >>> PRT to present PCI interrupt routing, all PCI devices' >>> interrupt pins >>> connect to IOAPIC, which doesn't match with kvm-ia64 Qemu PCI interrupt >>> routing. >>> >>> This patch modify Qemu PCI interupt routing code to match with GFW, >>> Then PCI devices in qemu can work in kvm-ia64, for exmaple, NIC >>> >>> >>> Signed-off-by: Anthony Xu < anthony.xu@intel.com > >>> >>> >>> diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c >>> index 99a1736..80c116c 100644 >>> --- a/virt/kvm/ioapic.c >>> +++ b/virt/kvm/ioapic.c >>> @@ -272,7 +272,11 @@ void kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, >>> int irq, int level) >>> >>> if (irq >= 0 && irq < IOAPIC_NUM_PINS) { >>> entry = ioapic->redirtbl[irq]; >>> - level ^= entry.fields.polarity; >>> +// polarity of all devices in qemu is active high >>> +// regardless of ioapic setting >>> + >>> +// level ^= entry.fields.polarity; >>> + >>> >> >> There are two errors in this patch: >> >> - kvm is not there just for qemu; it should be possible to use kvm >> with some other userspace, which would assume that kvm correctly >> emulates ioapic polarity >> - you are modifying shared code and so affect x86 as well > > Apparently this is broken on x86 too. I was just trying this patch > with Mac OS X as target and magically the in-kernel APIC starts > working, so I guess something is going wrong already here. > Btw, according to the ACPI tables, all PCI interrupts are currently > defined Active-Low. Sorry, ActiveHigh that is. Nevertheless I am having trouble with this since the very first time I used osx inside KVM. Does PCI allow Active > Interrupt (, Level, ActiveHigh, Shared) According to the PCI 3.0 Spec, "Interrupts on PCI are optional and defined as 'level sensitive,' asserted low (negative true)". Alex