Re: [PATCH] kvm-ia64 irq assignment 1/2 kernel

[Avi Kivity <avi@qumranet.com>]

Xu, Anthony wrote:
> Avi Kivity wrote:
>   
>> I suggest modifying the firmware to report the interrupts as active
>> high.  Since Xen does not emulate polarity, the change will not affect
>> it and the firmware can continue to be shared.  I'd also recommend
>> fixing Xen to emulate the polarity correctly, if possible.
>>     
>
> Thanks for your comments
> I agree modifying common code is not a good method.
>
> While your suggestion seems be infeasible too.
> According to acpi spec, only irq <=15 can be configured, such as trigger
> level, polarity.
> For irq >15 , means connect to IOAPIC directly, it can't be configured,
> it must be level triger, active low.
>   

Yes.

> I can't find any mechanism in firmware to configure irqs (> 15). Please
> enlighten me if you have.
>
>   

Okay. In any case we should emulate hardware as closely as possible to 
reality, so mu suggestion wasn't a good one.

> I think below scheme is feasible,
> 1. all PCI devices in Qemu uses level trigger, active low interrupt.
> (not include ide, even though it is a PCI device, it uses legacy
> interrupt mechanism)
> 	
> 2. in Guest Firmware, all PCI devices' interrupts are configured as
> level trigger, active low 
>    for KVM/IA32 Guest firmware, just a little modifications
>                 Name(_PRS, ResourceTemplate(){
>                     Interrupt (, Level, ActiveHigh, Shared)--> Interrupt
> (, Level, ActiveLow, Shared)
>
>
> There are some modifications in Qemu, But I think it's a worthwhile,
> it's a thoroghly solution both for KVM/IA32 and KVM/IA64.
>
>   

I agree. Note that the piix chipset used on x86 inverts the pci 
interrupts again so they become active high. But for ioapic mode we may 
be able to use active low interrupts.

-- 
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.