From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anthony Liguori Subject: Re: [PATCH 1/5] vring: Replace mmap() interface with ioctl() Date: Sun, 15 Jun 2008 14:13:36 -0500 Message-ID: <485569E0.9050109@us.ibm.com> References: <1213365481-23460-1-git-send-email-markmc@redhat.com> <1213365481-23460-2-git-send-email-markmc@redhat.com> <200806141902.54119.rusty@rustcorp.com.au> <4853D3CB.4090709@qumranet.com> <485452E6.4070201@us.ibm.com> <4855343E.4020808@qumranet.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Cc: Rusty Russell , Mark McLoughlin , kvm@vger.kernel.org To: Avi Kivity Return-path: Received: from e5.ny.us.ibm.com ([32.97.182.145]:54233 "EHLO e5.ny.us.ibm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750871AbYFOTNz (ORCPT ); Sun, 15 Jun 2008 15:13:55 -0400 Received: from d01relay02.pok.ibm.com (d01relay02.pok.ibm.com [9.56.227.234]) by e5.ny.us.ibm.com (8.13.8/8.13.8) with ESMTP id m5FJDs4A003353 for ; Sun, 15 Jun 2008 15:13:54 -0400 Received: from d01av02.pok.ibm.com (d01av02.pok.ibm.com [9.56.224.216]) by d01relay02.pok.ibm.com (8.13.8/8.13.8/NCO v9.0) with ESMTP id m5FJDsxs217056 for ; Sun, 15 Jun 2008 15:13:54 -0400 Received: from d01av02.pok.ibm.com (loopback [127.0.0.1]) by d01av02.pok.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id m5FJDsKm009184 for ; Sun, 15 Jun 2008 15:13:54 -0400 In-Reply-To: <4855343E.4020808@qumranet.com> Sender: kvm-owner@vger.kernel.org List-ID: Avi Kivity wrote: > Anthony Liguori wrote: >>> >>> And also, because memory hotplug and 64-bit PCI BARs require >>> reserving an infinite virtual address space range. Not to mention >>> that someone needs to update the dirty bitmap in case we're live >>> migrating. >> >> You can certainly hotplug to the next RAM address so it doesn't >> require infinite space. > > But you need to reserve that space to prevent mallocs from going > there. How much space do you reserve? It's deterministic at least. Any physical system has a maximum amount of physical memory that it supports so hotplug cannot exceed that amount. >> You wouldn't send a packet from/to a PCI IO region so I don't think >> that practically speaking that's a problem. > > If we implement interguest shared memory as a pci device, then it > becomes a problem. We can set an explicit BAR to keep the physical address reasonable. I'm not arguing that we should enforce base/limit, just that it is possible. I think the burden is to prove that enforcing base/limit provides a significant performance boost to warrant the complexity. The nastiest bit of manipulating the ring in-kernel is that it requires TX mitigation to be within the kernel. This means that adjusting the heuristics for adaptive TX mitigation will require host kernel modifications which stinks IMHO. Regards, Anthony Liguori