[PATCH][REPOST]: Fake emulate Intel perfctr MSRs

[PATCH][REPOST]: Fake emulate Intel perfctr MSRs

[Chris Lalancette]

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Respin of my previous patch to fake emulate the Intel perfctr MSRs.  As Sheng
Yang pointed out, I didn't need an additional include, and I could use other
#define's.

Signed-off-by: Chris Lalancette <clalance@redhat.com>

[-- Attachment #2: kvm-intel-wrmsr-emulate-2.patch --]
[-- Type: text/x-patch, Size: 709 bytes --]

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 6e4278d..f2feacf 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -917,6 +917,18 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 	case MSR_IA32_TIME_STAMP_COUNTER:
 		guest_write_tsc(data);
 		break;
+	case MSR_P6_PERFCTR0:
+	case MSR_P6_PERFCTR1:
+	case MSR_P6_EVNTSEL0:
+	case MSR_P6_EVNTSEL1:
+		/*
+		 * Just discard all writes to the performance counters; this
+		 * should keep both older linux and windows 64-bit guests
+		 * happy
+		 */
+		pr_unimpl(vcpu, "unimplemented perfctr wrmsr: 0x%x data 0x%llx\n", msr_index, data);
+
+		break;
 	default:
 		msr = find_msr_entry(vmx, msr_index);
 		if (msr) {

Re: [PATCH][REPOST]: Fake emulate Intel perfctr MSRs

[Avi Kivity]

Chris Lalancette wrote:
> Respin of my previous patch to fake emulate the Intel perfctr MSRs.  As Sheng
> Yang pointed out, I didn't need an additional include, and I could use other
> #define's.
>
>   

Applied, thanks.  Sorry about the delay.

-- 
error compiling committee.c: too many arguments to function

[PATCH] [REPOST]: Fake emulate Intel perfctr MSRs

[Chris Lalancette]

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Attached is a patch for fake emulating Intel perfctr MSRs, similar to the recent
patch to fake emulate the AMD perfctr MSRs.  This is needed for a reason similar
for the previous patch; older linux guests (in this case, 2.6.9) can attempt to
access the MSR's without a fixup section, and injecting a GPF kills the guest.
Tested by me on RHEL-4 i386 and x86_64 guests, as well as F-9 guests.

Signed-off-by: Chris Lalancette <clalance@redhat.com>

[-- Attachment #2: kvm-intel-wrmsr-emulate.patch --]
[-- Type: text/x-patch, Size: 905 bytes --]

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index aaa99ed..f28789e 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -29,6 +29,7 @@
 
 #include <asm/io.h>
 #include <asm/desc.h>
+#include <asm/intel_arch_perfmon.h>
 
 #define __ex(x) __kvm_handle_fault_on_reboot(x)
 
@@ -916,6 +917,18 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 	case MSR_IA32_TIME_STAMP_COUNTER:
 		guest_write_tsc(data);
 		break;
+	case MSR_ARCH_PERFMON_EVENTSEL0:
+	case MSR_ARCH_PERFMON_EVENTSEL1:
+	case MSR_ARCH_PERFMON_PERFCTR0:
+	case MSR_ARCH_PERFMON_PERFCTR1:
+		/*
+		 * Just discard all writes to the performance counters; this
+		 * should keep both older linux and windows 64-bit guests
+		 * happy
+		 */
+		pr_unimpl(vcpu, "unimplemented perfctr wrmsr: 0x%x data 0x%llx\n", msr_index, data);
+
+		break;
 	default:
 		msr = find_msr_entry(vmx, msr_index);
 		if (msr) {

Re: [PATCH] [REPOST]: Fake emulate Intel perfctr MSRs

[Yang, Sheng]

On Thursday 19 June 2008 15:14:58 Chris Lalancette wrote:
> Attached is a patch for fake emulating Intel perfctr MSRs, similar to the
> recent patch to fake emulate the AMD perfctr MSRs.  This is needed for a
> reason similar for the previous patch; older linux guests (in this case,
> 2.6.9) can attempt to access the MSR's without a fixup section, and
> injecting a GPF kills the guest. Tested by me on RHEL-4 i386 and x86_64
> guests, as well as F-9 guests.
>
> Signed-off-by: Chris Lalancette <clalance@redhat.com>

Hi, Chris

It seems you can use something like MSR_P6_EVNTSEL0 to avoid brought in new 
#include? :)

(BTW: these four MSRs are P6 architecture specific ones, and two of them 
shared by Pentium architecture)

-- 
Thanks
Yang, Sheng

Re: [PATCH] [REPOST]: Fake emulate Intel perfctr MSRs

[Chris Lalancette]

Yang, Sheng wrote:
> Hi, Chris
> 
> It seems you can use something like MSR_P6_EVNTSEL0 to avoid brought in new 
> #include? :)
> 
> (BTW: these four MSRs are P6 architecture specific ones, and two of them 
> shared by Pentium architecture)
> 

Hello,
     Oh, thanks for the pointer.  I didn't even see those additional #define's!
 I'll respin the patch like you suggest.

Thanks,
Chris Lalancette