From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alexander Graf Subject: Re: [PATCH] Ignore DEBUGCTL MSRs Date: Wed, 09 Jul 2008 14:48:55 +0200 Message-ID: <4874B3B7.7060003@suse.de> References: <4860806D.6000608@suse.de> <486F6904.2040907@qumranet.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="------------090000010805040407030402" Cc: kvm@vger.kernel.org, joerg.roedel@amd.com To: Avi Kivity Return-path: Received: from cantor.suse.de ([195.135.220.2]:49197 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753637AbYGINkb (ORCPT ); Wed, 9 Jul 2008 09:40:31 -0400 In-Reply-To: <486F6904.2040907@qumranet.com> Sender: kvm-owner@vger.kernel.org List-ID: This is a multi-part message in MIME format. --------------090000010805040407030402 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Avi Kivity wrote: > Alexander Graf wrote: >> Netware writes and reads to the DEBUGCTL and LAST*IP MSRs without >> further checks and is really confused to receive a #GP during that. >> To make it happy we should just make them stubs, which is exactly >> what SVM already does. >> >> To support VMX too, I put these in the generic code. Maybe the SVM >> code could be cleaned up to use generic code too. >> > > Please add a pr_unimpl() when bits that cause a real processor to do > something are set. Like this? I also removed the set handlers for the *IP MSRs, as these are read only and made it only handle debug bits, no perfmon bits. Signed-off-by: Alexander Graf --------------090000010805040407030402 Content-Type: text/x-patch; name="kvm-netware.patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="kvm-netware.patch" diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index fc0721e..10f5e95 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -609,6 +609,15 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n", __func__, data); break; + case MSR_IA32_DEBUGCTLMSR: + if (data > (DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) { + /* Values other than LBR and BTF are vendor-specific, + thus reserved and should throw a #GP */ + return 1; + } + pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n", + __func__, data); + break; case MSR_IA32_UCODE_REV: case MSR_IA32_UCODE_WRITE: break; @@ -705,6 +714,11 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) case MSR_IA32_MC0_MISC+16: case MSR_IA32_UCODE_REV: case MSR_IA32_EBL_CR_POWERON: + case MSR_IA32_DEBUGCTLMSR: + case MSR_IA32_LASTBRANCHFROMIP: + case MSR_IA32_LASTBRANCHTOIP: + case MSR_IA32_LASTINTFROMIP: + case MSR_IA32_LASTINTTOIP: data = 0; break; case MSR_MTRRcap: --------------090000010805040407030402--