From mboxrd@z Thu Jan  1 00:00:00 1970
From: Avi Kivity <avi@qumranet.com>
Subject: Re: [PATCH] KVM: Qemu: Enable kvm/ia64's network.
Date: Mon, 25 Aug 2008 14:35:54 +0300
Message-ID: <48B2991A.90903@qumranet.com>
References: <42DFA526FC41B1429CE7279EF83C6BDC01845A2E@pdsmsx415.ccr.corp.intel.com> <48B12842.5090308@qumranet.com> <42DFA526FC41B1429CE7279EF83C6BDC01845B03@pdsmsx415.ccr.corp.intel.com> <48B12EEA.6060200@qumranet.com> <42DFA526FC41B1429CE7279EF83C6BDC01845C49@pdsmsx415.ccr.corp.intel.com>
Mime-Version: 1.0
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
Content-Transfer-Encoding: 7bit
Cc: kvm-ia64@vger.kernel.org, kvm@vger.kernel.org
To: "Zhang, Xiantao" <xiantao.zhang@intel.com>
Return-path: <kvm-owner@vger.kernel.org>
Received: from il.qumranet.com ([212.179.150.194]:39739 "EHLO il.qumranet.com"
	rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP
	id S1753157AbYHYLf4 (ORCPT <rfc822;kvm@vger.kernel.org>);
	Mon, 25 Aug 2008 07:35:56 -0400
In-Reply-To: <42DFA526FC41B1429CE7279EF83C6BDC01845C49@pdsmsx415.ccr.corp.intel.com>
Sender: kvm-owner@vger.kernel.org
List-ID: <kvm.vger.kernel.org>

Zhang, Xiantao wrote:
>  Hi, Avi 
>      Since x86 and IA-64's ioapic don't have same number of PINs. They
> have to use different map functions.  Besides,  we also need to modify
> x86's dsdt to meet the map,  so in this patch, I just changed it for
> ia64 side, and didn't touch x86.  Maybe x86 needs another patch. Please
> help to apply. 
> Thanks
> Xiantao
>
> From d2bc9284cb659d120beb7dd224567f7a859d80ce Mon Sep 17 00:00:00 2001
> From: Xiantao Zhang <xiantao.zhang@intel.com>
> Date: Mon, 25 Aug 2008 09:28:29 +0800
> Subject: [PATCH] KVM: Qemu: Enable kvm/ia64's network.
>
> kvm/ia64's IRQ may >16, but current Qemu can't support it.
> Here we implment a IRQ map function to solve this issue to
> enable its networking.
>
> diff --git a/qemu/hw/ipf.c b/qemu/hw/ipf.c
> index b11e328..134076a 100644
> --- a/qemu/hw/ipf.c
> +++ b/qemu/hw/ipf.c
> @@ -672,3 +672,32 @@ QEMUMachine ipf_machine = {
>      ipf_init_pci,
>      VGA_RAM_SIZE + VGA_RAM_SIZE,
>  };
> +
> +#define IOAPIC_NUM_PINS 48
> +
> +static int ioapic_irq_count[IOAPIC_NUM_PINS];
> +
> +static int ioapic_map_irq(int devfn, int irq_num)
> +{
> +    int irq, dev;
> +    dev = devfn >> 3;
> +    irq = ((((dev << 2) + (dev >> 3) + irq_num) & 31) + 16);
> +    return irq;
> +}
> +
> +void ioapic_set_irq(void *opaque, int irq_num, int level)
> +{
> +    int vector;
> +
> +    PCIDevice *pci_dev = (PCIDevice *)opaque;
> +    vector = ioapic_map_irq(pci_dev->devfn, irq_num);
> +
> +    if (level)
> +        ioapic_irq_count[vector] += 1;
> +    else
> +        ioapic_irq_count[vector] -= 1;
> +
> +    if (kvm_enabled())
> +	if (kvm_set_irq(vector, ioapic_irq_count[vector] == 0))
> +	    return;
> +}
>   

I could move this myself to pci.c, but then I might break it since I 
still don't have an ia64 host.  It's therefore best to put this in pci.c.

The formula can be made generic by replacing '& 31' by '% 
(IOAPIC_NUM_PINS - 16)', and having defining IOAPIC_NUM_PINS according 
to architecture.

> index 92683d1..07d37a8 100644
> --- a/qemu/hw/pci.c
> +++ b/qemu/hw/pci.c
> @@ -544,6 +544,11 @@ static void pci_set_irq(void *opaque, int irq_num,
> int level)
>          return;
>  
>      pci_dev->irq_state[irq_num] = level;
> +
> +#if defined(TARGET_IA64)
> +    ioapic_set_irq(pci_dev, irq_num, level);
> +#endif
> +
>      for (;;) {
>          bus = pci_dev->bus;
>          irq_num = bus->map_irq(pci_dev, irq_num);
>   

This generates a compile warning now.

Please move it to pci.c.  You only need to make sure it works on ia64; I 
will take care of x86.

-- 
error compiling committee.c: too many arguments to function