From mboxrd@z Thu Jan  1 00:00:00 1970
From: Avi Kivity <avi@redhat.com>
Subject: Re: [PATCH 4/4] kvm: bios: switch MTRRs to cover only the PCI range
 and default to WB
Date: Sat, 27 Sep 2008 16:36:01 +0300
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References: <1222365149.8138.266.camel@2710p.home> <200809271335.10166.sheng.yang@intel.com>
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Cc: kvm@vger.kernel.org, Alex Williamson <alex.williamson@hp.com>
To: "Yang, Sheng" <sheng.yang@intel.com>
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Yang, Sheng wrote:
> I think we should do a little more than just write msr to update mtrr.
>
> Intel SDM 10.11.8 "MTRR consideration in MP Systems" define the procedure to 
> modify MTRR msr in MP. Especially, step 4 enter no-fill cache mode(set CR0.CD 
> bit and clean NW bit), step 12 re-enabled the caching(clear this two bits).
>
> We based on these behaviors to detect MTRR update.
>
>   

Why not simply flush the mmu on an mtrr write?

(though of course I have no objection to doing what the manual says)

-- 
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.