From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anthony Liguori Subject: Re: [PATCH] KVM: VMX: Set IGMT bit in EPT entry Date: Thu, 06 Nov 2008 07:47:59 -0600 Message-ID: <4912F58F.8090605@codemonkey.ws> References: <1225954545-8280-1-git-send-email-sheng@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: Avi Kivity , kvm@vger.kernel.org To: Sheng Yang Return-path: Received: from el-out-1112.google.com ([209.85.162.183]:5376 "EHLO el-out-1112.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753828AbYKFNsE (ORCPT ); Thu, 6 Nov 2008 08:48:04 -0500 Received: by el-out-1112.google.com with SMTP id z25so301531ele.1 for ; Thu, 06 Nov 2008 05:48:03 -0800 (PST) In-Reply-To: <1225954545-8280-1-git-send-email-sheng@linux.intel.com> Sender: kvm-owner@vger.kernel.org List-ID: Sheng Yang wrote: > (Patch for 2.6.27, based on kvm-updates/2.6.27) > > There is a potential issue that, when guest using pagetable without vmexit when > EPT enabled, guest would use PAT/PCD/PWT bits to index PAT msr for it's memory, > which would be inconsistent with host side and would cause host MCE due to > inconsistent cache attribute. > > The patch set IGMT bit in EPT entry to ignore guest PAT and use WB as default > memory type to protect host (notice that all memory mapped by KVM should be WB). > So this seems incompatible with hardware passthrough, since that would require being able to map guest memory as something other than WB. Is there a fix for that? Regards, Anthony Liguori > Signed-off-by: Sheng Yang > --- > arch/x86/kvm/vmx.c | 3 ++- > arch/x86/kvm/vmx.h | 1 + > 2 files changed, 3 insertions(+), 1 deletions(-) > > diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c > index 7041cc5..8277466 100644 > --- a/arch/x86/kvm/vmx.c > +++ b/arch/x86/kvm/vmx.c > @@ -3300,7 +3300,8 @@ static int __init vmx_init(void) > bypass_guest_pf = 0; > kvm_mmu_set_base_ptes(VMX_EPT_READABLE_MASK | > VMX_EPT_WRITABLE_MASK | > - VMX_EPT_DEFAULT_MT << VMX_EPT_MT_EPTE_SHIFT); > + VMX_EPT_DEFAULT_MT << VMX_EPT_MT_EPTE_SHIFT | > + VMX_EPT_IGMT_BIT); > kvm_mmu_set_mask_ptes(0ull, 0ull, 0ull, 0ull, > VMX_EPT_EXECUTABLE_MASK); > kvm_enable_tdp(); > diff --git a/arch/x86/kvm/vmx.h b/arch/x86/kvm/vmx.h > index 23e8373..198cdf3 100644 > --- a/arch/x86/kvm/vmx.h > +++ b/arch/x86/kvm/vmx.h > @@ -370,6 +370,7 @@ enum vmcs_field { > #define VMX_EPT_READABLE_MASK 0x1ull > #define VMX_EPT_WRITABLE_MASK 0x2ull > #define VMX_EPT_EXECUTABLE_MASK 0x4ull > +#define VMX_EPT_IGMT_BIT (1ull << 6) > > #define VMX_EPT_IDENTITY_PAGETABLE_ADDR 0xfffbc000ul > >