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From: Jan Kiszka <jan.kiszka@siemens.com>
To: Avi Kivity <avi@redhat.com>
Cc: Jan Kiszka <jan.kiszka@web.de>, kvm-devel <kvm@vger.kernel.org>,
	"Xu, Jiajun" <jiajun.xu@intel.com>,
	"Yang, Sheng" <sheng.yang@intel.com>
Subject: Re: [PATCH] KVM: VMX: Fix race between pending IRQ and NMI
Date: Thu, 20 Nov 2008 14:29:45 +0100	[thread overview]
Message-ID: <49256649.6060801@siemens.com> (raw)
In-Reply-To: <49248514.9020605@redhat.com>

Avi Kivity wrote:
> Avi Kivity wrote:
>> Jan Kiszka wrote:
>>> Jiajun kindly provided me a RHEL kernel and initrd (2.6.18-53-el5) which
>>> I ran for a while (or booted a few times) to trigger the hang. Basically
>>> you need high IRQ load (preferably via LAPIC, to exploit that un-acked
>>> IRQs will block low-prio IRQs as well) + high NMI load (e.g. via NMI
>>> watchdog).
>>>   
>>
>> I was able to reproduce it easily by zapping the mmu every second.
>>
>> Attached is a patch the fixes it for me.  Basically it avoids the nmi
>> path if an interrupt is being injected.  This is closer to my event
>> queue plan, and also is similar to what the code does today with
>> exceptions (avoid ->inject_pending_irq() if an exception is pending).
>>
> 
> Oh, and I think this is more correct than the previous approach of
> letting the nmi preempt the interrupt.
> 
> The nmi handler could change the tpr to mask the preempted interrupt;
> but the code would not notice that.  Once the interrupt was injected the
> guest would see an interrupt at a higher priority than it has programmed
> the hardware to allow.

I consider this a bit far fetch. What sane NMI handler would fiddle with
the APIC? It would be fairly tricky to properly synchronize this with
the rest of the OS.

> 
> Basically, once we commit to an interrupt via kvm_cpu_get_interrupt(),
> we must inject it before the any instruction gets executed.
> 
> I don't think any real guest would notice, though.
> 

Well, I have no problems with your approach (when also applied on the
user space irqchip path) of keeping the order *if* we can ensure that
only the first instruction of the IRQ handler is executed and we will
then inject the NMI. Otherwise this opens a prio inversion between IRQs
and NMIs. The point is that, unless I'm overseeing some detail right
now, your approach will inject the pending NMI only once the guest
/happens/ to exit the VM, right? If yes, then it's a no-go IMHO, also
for keeping this property with the queue approach.

Jan

-- 
Siemens AG, Corporate Technology, CT SE 2 ES-OS
Corporate Competence Center Embedded Linux

  reply	other threads:[~2008-11-20 13:30 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-11-10 15:52 [PATCH] KVM: VMX: Fix race between pending IRQ and NMI Jan Kiszka
2008-11-16 12:29 ` Avi Kivity
2008-11-16 14:58   ` Jan Kiszka
2008-11-16 15:15     ` Avi Kivity
2008-11-16 15:39       ` Jan Kiszka
2008-11-19 17:38         ` Avi Kivity
2008-11-19 21:28           ` Avi Kivity
2008-11-20 13:29             ` Jan Kiszka [this message]
2008-11-20 13:59               ` Avi Kivity
2008-11-21 10:04                 ` Jan Kiszka
2008-11-21 11:14                   ` Avi Kivity
2008-11-22 12:25                   ` Avi Kivity
2008-11-24  9:55                     ` Jan Kiszka
2008-11-25 14:45                       ` Avi Kivity
2008-11-25 14:55                         ` Jan Kiszka

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