From mboxrd@z Thu Jan 1 00:00:00 1970 From: Avi Kivity Subject: Re: [PATCH] CPUID Masking MSRs Date: Wed, 07 Jan 2009 12:07:55 +0200 Message-ID: <49647EFB.1090309@redhat.com> References: <1231318388-1899-1-git-send-email-agraf@suse.de> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: kvm@vger.kernel.org, joerg.roedel@amd.com To: Alexander Graf Return-path: Received: from mx2.redhat.com ([66.187.237.31]:36910 "EHLO mx2.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751481AbZAGKIH (ORCPT ); Wed, 7 Jan 2009 05:08:07 -0500 In-Reply-To: <1231318388-1899-1-git-send-email-agraf@suse.de> Sender: kvm-owner@vger.kernel.org List-ID: Alexander Graf wrote: > Current AMD CPUs support masking of CPUID bits. Using this functionality, > a VMM can limit what features are exposed to the guest, even if it's not > using SVM/VMX. > > While I'm not aware of any open source hypervisor that uses these MSRs > atm, VMware ESX does and patches exist for Xen, where trapping CPUID is > non-trivial. > > This patch implements emulation for this masking, which is pretty trivial > because we're intercepting CPUID anyways. > > Because it's so simple and can be pretty effective, I put it into the > generic code paths, so VMX benefits from it as well. > > Missing save/restore support. Note that Intel has similar functionality, called FlexMigration IIRC, likely using different MSRs. -- error compiling committee.c: too many arguments to function