From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andre Przywara Subject: Re: [PATCH] CPUID Masking MSRs Date: Wed, 7 Jan 2009 12:16:43 +0100 Message-ID: <49648F1B.5080606@amd.com> References: <1231318388-1899-1-git-send-email-agraf@suse.de> <49647EFB.1090309@redhat.com> <4893C049-E52F-4CB5-8A27-F14AF9314612@suse.de> <49648277.7030708@redhat.com> <49648511.8050401@suse.de> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: Avi Kivity , kvm@vger.kernel.org, joerg.roedel@amd.com To: Alexander Graf Return-path: Received: from outbound-va3.frontbridge.com ([216.32.180.16]:53720 "EHLO VA3EHSOBE005.bigfish.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752224AbZAGLPc convert rfc822-to-8bit (ORCPT ); Wed, 7 Jan 2009 06:15:32 -0500 In-Reply-To: <49648511.8050401@suse.de> Sender: kvm-owner@vger.kernel.org List-ID: Alexander Graf wrote: > Well if I could take the FlexMigration design into account when putti= ng > variables in the vcpu context, that'd be great. But I can't seem to f= ind > it in the Intel documentation, so I'll leave it for now. Not real documentation (tell me if you find some!), but this code shows= =20 almost everything you probably need: http://xenbits.xensource.com/xen-unstable.hg?rev/be20b11656bb Regards, Andre. --=20 Andre Przywara AMD-Operating System Research Center (OSRC), Dresden, Germany Tel: +49 351 277-84917 ----to satisfy European Law for business letters: Advanced Micro Devices GmbH Karl-Hammerschmidt-Str. 34, 85609 Dornach b. M=FCnchen Gesch=E4ftsf=FChrer: Jochen Polster; Thomas M. McCoy; Giuliano Meroni Sitz: Dornach, Gemeinde Aschheim, Landkreis M=FCnchen Registergericht M=FCnchen, HRB Nr. 43632