From: Avi Kivity <avi@redhat.com>
To: tgingold@free.fr
Cc: "Zhang, Yang" <yang.zhang@intel.com>,
"kvm-ia64@vger.kernel.org" <kvm-ia64@vger.kernel.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"Zhang, Xiantao" <xiantao.zhang@intel.com>
Subject: Re: [PATCH] KVM: Qemu: Flush i-cache after ide-dma operation in IA64
Date: Thu, 02 Apr 2009 18:53:14 +0300 [thread overview]
Message-ID: <49D4DF6A.7080108@redhat.com> (raw)
In-Reply-To: <1238686878.49d4dc9e051aa@imp.free.fr>
tgingold@free.fr wrote:
>
>> What about smp?
>>
>
> fc will broadcast to the coherence domain the cache invalidation. So it is
> SMP-ready for usual machines.
>
>
Interesting.
>> I'm surprised the guest doesn't do this by itself?
>>
>
> It doesn't had to do it. The PCI transaction will automatically invalidate
> caches - but qemu doesn't emulate this (and doesn't need to do on x86).
>
So any DMA on ia64 will flush the instruction caches?!
--
error compiling committee.c: too many arguments to function
next prev parent reply other threads:[~2009-04-02 15:53 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-04-02 2:01 [PATCH] KVM: Qemu: Flush i-cache after ide-dma operation in IA64 Zhang, Yang
2009-04-02 8:55 ` Avi Kivity
2009-04-02 15:41 ` tgingold
2009-04-02 15:53 ` Avi Kivity [this message]
2009-04-02 15:59 ` Avi Kivity
2009-04-03 1:22 ` Zhang, Xiantao
2009-04-03 1:13 ` Zhang, Xiantao
2009-04-03 1:31 ` Zhang, Xiantao
2009-04-03 11:06 ` Avi Kivity
2009-04-06 16:31 ` Hollis Blanchard
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