From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gabe Black Subject: unhandled vm exit: 0x80000021 vcpu_id 0 Date: Fri, 29 May 2009 02:52:53 -0700 Message-ID: <4A1FB075.1050202@eecs.umich.edu> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: nathan binkert , Steve Reinhardt To: kvm@vger.kernel.org Return-path: Received: from mail-px0-f123.google.com ([209.85.216.123]:56348 "EHLO mail-px0-f123.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753087AbZE2JxQ (ORCPT ); Fri, 29 May 2009 05:53:16 -0400 Received: by pxi29 with SMTP id 29so1475468pxi.33 for ; Fri, 29 May 2009 02:53:18 -0700 (PDT) Sender: kvm-owner@vger.kernel.org List-ID: Hello again. I'm making more progress getting KVM going in M5, and right now I'm trying to figure out why I'm getting an unhandled vm exit with exit code 0x80000021. According to Intel's manual, something about the guest state isn't being set up correctly. I dumped the initial register state for the 0th virtual CPU and noticed that some things Intel claims are illegal show up there, for instance having paging and protected mode disabled. I'm assuming there's some cooking done to the state as presented to KVM to, for instance, substitute V8086 mode for real mode, etc. I've fixed a number of bugs in M5 that cleaned up some issues, but I'm hoping somebody with more knowledge can tell me what illegal state is still there that would make it through the kvms twiddling and cause VMX to abort. One thing that I know looks funny is that the limit on the IDT is zero, but I haven't been able to find any evidence in the manuals that that's considered wrong rather than just a bad idea. Any help here would be very appreciated! Gabe rax 0000000000000000 rbx 0000000000000000 rcx 0000000000000000 rdx 0000000000000000 rsi 0000000000090200 rdi 0000000000000000 rsp 0000000000000000 rbp 0000000000000000 r8 0000000000000000 r9 0000000000000000 r10 0000000000000000 r11 0000000000000000 r12 0000000000000000 r13 0000000000000000 r14 0000000000000000 r15 0000000000000000 rip 0000000000200000 rflags 00000002 cs 0008 (00000000/ffffffff p 1 dpl 0 db 0 s 1 type a l 1 g 1 avl 0) ds 0010 (00000000/ffffffff p 1 dpl 0 db 1 s 1 type 2 l 0 g 1 avl 0) es 0010 (00000000/ffffffff p 1 dpl 0 db 1 s 1 type 2 l 0 g 1 avl 0) ss 0010 (00000000/ffffffff p 1 dpl 0 db 1 s 1 type 2 l 0 g 1 avl 0) fs 0010 (00000000/ffffffff p 1 dpl 0 db 1 s 1 type 2 l 0 g 1 avl 0) gs 0010 (00000000/ffffffff p 1 dpl 0 db 1 s 1 type 2 l 0 g 1 avl 0) tr 0018 (00000000/ffffffff p 1 dpl 0 db 1 s 0 type b l 0 g 1 avl 0) ldt 0000 (00000000/00000000 p 0 dpl 0 db 0 s 0 type 0 l 0 g 0 avl 0) gdt 76000/17 idt 0/0 cr0 80000011 cr2 0 cr3 70000 cr4 20 cr8 0 efer 500