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From: Jan Kiszka <jan.kiszka@siemens.com>
To: Nitin A Kamble <nitin.a.kamble@intel.com>
Cc: Avi Kivity <avi@redhat.com>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"; jun.nakajima"@intel.com
Subject: Re: [patch] VMX Unrestricted mode support
Date: Thu, 04 Jun 2009 20:13:26 +0200	[thread overview]
Message-ID: <4A280EC6.3080703@siemens.com> (raw)
In-Reply-To: <1244052535.26481.22.camel@mukti.sc.intel.com>

Nitin A Kamble wrote:
> Hi Avi,
>   I find that the qemu processor reset state is not per the IA32
> processor specifications. (Sections 8.1.1 of
> http://www.intel.com/Assets/PDF/manual/253668.pdf)
> 
> In qemu-kvm.git in file target-i386/helper.c in function cpu_reset the
> segment registers are initialized as follows:
> 
> cpu_x86_load_seg_cache(env, R_CS, 0xf000, 0xffff0000, 0xffff,
>                            DESC_P_MASK | DESC_S_MASK | DESC_CS_MASK | 
> 				DESC_R_MASK);
> cpu_x86_load_seg_cache(env, R_DS, 0, 0, 0xffff,
>                            DESC_P_MASK | DESC_S_MASK | DESC_W_MASK);
> cpu_x86_load_seg_cache(env, R_ES, 0, 0, 0xffff,
>                            DESC_P_MASK | DESC_S_MASK | DESC_W_MASK);
> cpu_x86_load_seg_cache(env, R_SS, 0, 0, 0xffff,
>                            DESC_P_MASK | DESC_S_MASK | DESC_W_MASK);
> cpu_x86_load_seg_cache(env, R_FS, 0, 0, 0xffff,
>                            DESC_P_MASK | DESC_S_MASK | DESC_W_MASK);
> cpu_x86_load_seg_cache(env, R_GS, 0, 0, 0xffff,
>                            DESC_P_MASK | DESC_S_MASK | DESC_W_MASK);
> 
> While the IA32 cpu reset state specification says that Segment Accessed
> bit is also 1 at the time of cpu reset. so the above code should look
> like this:
> 
> cpu_x86_load_seg_cache(env, R_CS, 0xf000, 0xffff0000, 0xffff,
>                  DESC_P_MASK | DESC_S_MASK | DESC_CS_MASK | 
>                  DESC_R_MASK | DESC_A_MASK);
> cpu_x86_load_seg_cache(env, R_DS, 0, 0, 0xffff,
>                  DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | DESC_A_MASK);
> cpu_x86_load_seg_cache(env, R_ES, 0, 0, 0xffff,
>                  DESC_P_MASK | DESC_S_MASK | DESC_W_MASK| DESC_A_MASK);
> cpu_x86_load_seg_cache(env, R_SS, 0, 0, 0xffff,
>                  DESC_P_MASK | DESC_S_MASK | DESC_W_MASK |DESC_A_MASK);
> cpu_x86_load_seg_cache(env, R_FS, 0, 0, 0xffff,
>                  DESC_P_MASK | DESC_S_MASK | DESC_W_MASK);
> cpu_x86_load_seg_cache(env, R_GS, 0, 0, 0xffff,
>                  DESC_P_MASK | DESC_S_MASK | DESC_W_MASK);
> 
> This discrepancy is adding the need of the following function in the
> unrestricted guest patch.

As Avi already indicated: Independent of the kvm workaround for older
qemu versions, please post (to qemu-devel) a patch against upstream's
git to fix the discrepancy.

Jan

-- 
Siemens AG, Corporate Technology, CT SE 2
Corporate Competence Center Embedded Linux

  parent reply	other threads:[~2009-06-04 18:13 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-05-28 23:11 [patch] VMX Unrestricted mode support Nitin A Kamble
2009-05-28 23:39 ` Alexey Eremenko
2009-05-29  4:04   ` [patch] VMX Unrestricted guest " Nitin A Kamble
2009-05-31  8:39 ` [patch] VMX Unrestricted " Avi Kivity
2009-06-01 18:06   ` Nitin A Kamble
2009-06-01 18:35     ` Nitin A Kamble
2009-06-01 18:38       ` Avi Kivity
2009-06-03 18:08         ` Nitin A Kamble
2009-06-03 18:18           ` Nitin A Kamble
2009-06-03 18:20           ` Avi Kivity
2009-06-04 18:13           ` Jan Kiszka [this message]
2009-05-31 15:23 ` Anthony Liguori
2009-05-31 16:01   ` Avi Kivity

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