From mboxrd@z Thu Jan 1 00:00:00 1970 From: Avi Kivity Subject: Re: [PATCH] move performance counter MSR access interception to generic x86 KVM path Date: Sun, 14 Jun 2009 11:00:31 +0300 Message-ID: <4A34AE1F.9020606@redhat.com> References: <1244836889-1365-1-git-send-email-andre.przywara@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: Chris Lalancette , Joerg Roedel , kvm@vger.kernel.org To: Andre Przywara Return-path: Received: from mx2.redhat.com ([66.187.237.31]:38367 "EHLO mx2.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753183AbZFNIAc (ORCPT ); Sun, 14 Jun 2009 04:00:32 -0400 In-Reply-To: <1244836889-1365-1-git-send-email-andre.przywara@amd.com> Sender: kvm-owner@vger.kernel.org List-ID: Andre Przywara wrote: > The performance counter MSRs are different for AMD and Intel CPUs and they > are chosen mainly by the CPUID vendor string. This patch catches writes to > all addresses (regardless of VMX/SVM path) and handles them in the generic > MSR handler routine. Writing a 0 into the event select register is something > we perfectly emulate ;-), so don't print out a warning to dmesg in this > case. > This fixes booting a 64bit Windows guest with an AMD CPUID on an Intel host. > > Applied, thanks. -- error compiling committee.c: too many arguments to function