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From: Andre Przywara <andre.przywara@amd.com>
To: Avi Kivity <avi@redhat.com>
Cc: kvm@vger.kernel.org
Subject: Re: [PATCH 4/4] dont trim the guest's hypervisor CPUID bit in KVM if the guest requests it
Date: Wed, 24 Jun 2009 14:28:53 +0200	[thread overview]
Message-ID: <4A421C05.3020203@amd.com> (raw)
In-Reply-To: <4A420DD4.4020905@redhat.com>

Avi Kivity wrote:
> On 06/24/2009 01:44 PM, Andre Przywara wrote:
>> Signed-off-by: Andre Przywara<andre.przywara@amd.com>
>> ---
>>   arch/x86/kvm/x86.c |    2 +-
>>   1 files changed, 1 insertions(+), 1 deletions(-)
>>
>> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
>> index e6e61ee..6ad0f93 100644
>> --- a/arch/x86/kvm/x86.c
>> +++ b/arch/x86/kvm/x86.c
>> @@ -1415,7 +1415,7 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 
>> *entry, u32 function,
>>           0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
>>           0 /* Reserved, DCA */ | F(XMM4_1) |
>>           F(XMM4_2) | 0 /* x2APIC */ | F(MOVBE) | F(POPCNT) |
>> -        0 /* Reserved, XSAVE, OSXSAVE */;
>> +        0 /* Reserved, XSAVE, OSXSAVE */ | F(HYPERVISOR);
>>    
> 
> I think this should be handled in qemu, since it isn't really a cpu bit.

But this would require to make an exception for turning this bit on 
again after it has been trimmed.
I just made (QEMU) patches for make this trimming really work (and 
removing all the hacked bits), so I would like to not spoil this again 
by introducing another excecption. After all this is more a list of what 
KVM does _not_ support (should we make this a negative one? gets ugly 
with the reserved bits), so I would like to leave it here.
I will send out the patches to qemu-devel when I found the last bug.

Regards,
Andre.

-- 
Andre Przywara
AMD-OSRC (Dresden)
Tel: x29712


  reply	other threads:[~2009-06-24 12:26 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-06-24 10:44 [PATCH 1/4] ignore AMDs HWCR register access to set the FFDIS bit Andre Przywara
2009-06-24 10:44 ` [PATCH 2/4] ignore reads from AMDs C1E enabled MSR Andre Przywara
2009-06-24 10:44   ` [PATCH 3/4] ignore PCI ECS I/O enablement Andre Przywara
2009-06-24 10:44     ` [PATCH 4/4] dont trim the guest's hypervisor CPUID bit in KVM if the guest requests it Andre Przywara
2009-06-24 11:28       ` Avi Kivity
2009-06-24 12:28         ` Andre Przywara [this message]
2009-06-24 13:28           ` Andre Przywara
2009-06-24 11:31     ` [PATCH 3/4] ignore PCI ECS I/O enablement Avi Kivity
2009-06-24 13:37       ` Andre Przywara
2009-07-01  9:50         ` Avi Kivity
2009-06-24 11:37 ` [PATCH 1/4] ignore AMDs HWCR register access to set the FFDIS bit Avi Kivity

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