From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jes Sorensen <Jes.Sorensen@redhat.com>
Subject: Re: KVM PMU virtualization
Date: Fri, 26 Feb 2010 12:01:58 +0100
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Cc: KVM General <kvm@vger.kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Avi Kivity <avi@redhat.com>,
	Zachary Amsden <zamsden@redhat.com>,
	Gleb Natapov <gleb@redhat.com>, Ingo Molnar <mingo@elte.hu>,
	ming.m.lin@intel.com,
	"Zhang, Yanmin" <yanmin_zhang@linux.intel.com>
To: Joerg Roedel <joro@8bytes.org>
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On 02/25/10 18:34, Joerg Roedel wrote:
> The biggest problem I see here is teaching the guest about the available
> events. The available event sets are dependent on the processor family
> (at least on AMD).
> A simple approach would be shadowing the perf msrs which is a simple
> thing to do. More problematic is the reinjection of performance
> interrupts and performance nmis.

IMHO the only real solution here is to map it to the host CPU, and
require -cpu host for PMU support. There is no point in trying to
emulate PMU features which we don't have in the hardware. Ie. you cannot
count cache misses if the hardware doesn't support it.

Cheers,
Jes