Re: [Qemu-devel] [PATCH] Inter-VM shared memory PCI device

Paul Brook
2010-03-08T13:04:48Z

> However, coherence could be made host-type-independent by the host
> mapping and unampping pages, so that each page is only mapped into one
> guest (or guest CPU) at a time. Just like some clustering filesystems
> do to maintain coherence.

You're assuming that a TLB flush implies a write barrier, and a TLB miss
implies a read barrier. I'd be surprised if this were true in general.

Paul