* [PATCH] KMV: VMX: consult IA32_VMX_EPT_VPID_CAP to determine EPT paging-structure memory type
@ 2010-03-22 9:06 Gui Jianfeng
2010-03-22 9:13 ` Sheng Yang
0 siblings, 1 reply; 4+ messages in thread
From: Gui Jianfeng @ 2010-03-22 9:06 UTC (permalink / raw)
To: Avi Kivity; +Cc: sheng, mtosatti, kvm
According to SDM, we need to configure EPT paging-structure memory type
by consulting IA32_VMX_EPT_VPID_CAP.
Signed-off-by: Gui Jianfeng <guijianfeng@cn.fujitsu.com>
---
arch/x86/include/asm/vmx.h | 2 ++
arch/x86/kvm/vmx.c | 12 +++++++++---
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index fb9a080..1b33a60 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -374,6 +374,8 @@ enum vmcs_field {
#define VMX_EPT_MT_EPTE_SHIFT 3
#define VMX_EPT_GAW_EPTP_SHIFT 3
#define VMX_EPT_DEFAULT_MT 0x6ull
+#define VMX_EPT_MT_WRBACK 0x6ull
+#define VMX_EPT_MT_UNCACHABLE 0x0ull
#define VMX_EPT_READABLE_MASK 0x1ull
#define VMX_EPT_WRITABLE_MASK 0x2ull
#define VMX_EPT_EXECUTABLE_MASK 0x4ull
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 06108f3..f971b9b 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -1804,9 +1804,15 @@ static u64 construct_eptp(unsigned long root_hpa)
{
u64 eptp;
- /* TODO write the value reading from MSR */
- eptp = VMX_EPT_DEFAULT_MT |
- VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT;
+ if (cpu_has_vmx_eptp_writeback())
+ eptp = VMX_EPT_MT_WRBACK |
+ VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT;
+ else if (cpu_has_vmx_eptp_uncacheable())
+ eptp = VMX_EPT_MT_UNCACHABLE |
+ VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT;
+ else
+ BUG();
+
eptp |= (root_hpa & PAGE_MASK);
return eptp;
--
1.6.5.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] KMV: VMX: consult IA32_VMX_EPT_VPID_CAP to determine EPT paging-structure memory type
2010-03-22 9:06 [PATCH] KMV: VMX: consult IA32_VMX_EPT_VPID_CAP to determine EPT paging-structure memory type Gui Jianfeng
@ 2010-03-22 9:13 ` Sheng Yang
2010-03-23 10:19 ` Avi Kivity
0 siblings, 1 reply; 4+ messages in thread
From: Sheng Yang @ 2010-03-22 9:13 UTC (permalink / raw)
To: Gui Jianfeng; +Cc: Avi Kivity, mtosatti, kvm
On Monday 22 March 2010 17:06:42 Gui Jianfeng wrote:
> According to SDM, we need to configure EPT paging-structure memory type
> by consulting IA32_VMX_EPT_VPID_CAP.
>
> Signed-off-by: Gui Jianfeng <guijianfeng@cn.fujitsu.com>
> ---
> arch/x86/include/asm/vmx.h | 2 ++
> arch/x86/kvm/vmx.c | 12 +++++++++---
> 2 files changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
> index fb9a080..1b33a60 100644
> --- a/arch/x86/include/asm/vmx.h
> +++ b/arch/x86/include/asm/vmx.h
> @@ -374,6 +374,8 @@ enum vmcs_field {
> #define VMX_EPT_MT_EPTE_SHIFT 3
> #define VMX_EPT_GAW_EPTP_SHIFT 3
> #define VMX_EPT_DEFAULT_MT 0x6ull
> +#define VMX_EPT_MT_WRBACK 0x6ull
> +#define VMX_EPT_MT_UNCACHABLE 0x0ull
> #define VMX_EPT_READABLE_MASK 0x1ull
> #define VMX_EPT_WRITABLE_MASK 0x2ull
> #define VMX_EPT_EXECUTABLE_MASK 0x4ull
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 06108f3..f971b9b 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -1804,9 +1804,15 @@ static u64 construct_eptp(unsigned long root_hpa)
> {
> u64 eptp;
>
> - /* TODO write the value reading from MSR */
> - eptp = VMX_EPT_DEFAULT_MT |
> - VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT;
> + if (cpu_has_vmx_eptp_writeback())
> + eptp = VMX_EPT_MT_WRBACK |
> + VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT;
I prefer to ensure WB is supported and used as default. Otherwise it would be
a big trouble for memory subsystem(to use UC for all memory). Both WB and UC
EPT memory types are ensured to be support in hardware.
And you can remove VMX_EPT_DEFAULT_MT as well.
--
regards
Yang, Sheng
> + else if (cpu_has_vmx_eptp_uncacheable())
> + eptp = VMX_EPT_MT_UNCACHABLE |
> + VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT;
> + else
> + BUG();
> +
> eptp |= (root_hpa & PAGE_MASK);
>
> return eptp;
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] KMV: VMX: consult IA32_VMX_EPT_VPID_CAP to determine EPT paging-structure memory type
2010-03-22 9:13 ` Sheng Yang
@ 2010-03-23 10:19 ` Avi Kivity
2010-03-26 1:39 ` Gui Jianfeng
0 siblings, 1 reply; 4+ messages in thread
From: Avi Kivity @ 2010-03-23 10:19 UTC (permalink / raw)
To: Sheng Yang; +Cc: Gui Jianfeng, mtosatti, kvm
On 03/22/2010 11:13 AM, Sheng Yang wrote:
>
>> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
>> index 06108f3..f971b9b 100644
>> --- a/arch/x86/kvm/vmx.c
>> +++ b/arch/x86/kvm/vmx.c
>> @@ -1804,9 +1804,15 @@ static u64 construct_eptp(unsigned long root_hpa)
>> {
>> u64 eptp;
>>
>> - /* TODO write the value reading from MSR */
>> - eptp = VMX_EPT_DEFAULT_MT |
>> - VMX_EPT_DEFAULT_GAW<< VMX_EPT_GAW_EPTP_SHIFT;
>> + if (cpu_has_vmx_eptp_writeback())
>> + eptp = VMX_EPT_MT_WRBACK |
>> + VMX_EPT_DEFAULT_GAW<< VMX_EPT_GAW_EPTP_SHIFT;
>>
> I prefer to ensure WB is supported and used as default. Otherwise it would be
> a big trouble for memory subsystem(to use UC for all memory). Both WB and UC
> EPT memory types are ensured to be support in hardware.
>
> And you can remove VMX_EPT_DEFAULT_MT as well.
>
I agree, hopefully we never ever see a cpu that doesn't support EPT WB.
--
error compiling committee.c: too many arguments to function
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] KMV: VMX: consult IA32_VMX_EPT_VPID_CAP to determine EPT paging-structure memory type
2010-03-23 10:19 ` Avi Kivity
@ 2010-03-26 1:39 ` Gui Jianfeng
0 siblings, 0 replies; 4+ messages in thread
From: Gui Jianfeng @ 2010-03-26 1:39 UTC (permalink / raw)
To: Avi Kivity; +Cc: Sheng Yang, mtosatti, kvm
Avi Kivity wrote:
> On 03/22/2010 11:13 AM, Sheng Yang wrote:
>>
>>> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
>>> index 06108f3..f971b9b 100644
>>> --- a/arch/x86/kvm/vmx.c
>>> +++ b/arch/x86/kvm/vmx.c
>>> @@ -1804,9 +1804,15 @@ static u64 construct_eptp(unsigned long root_hpa)
>>> {
>>> u64 eptp;
>>>
>>> - /* TODO write the value reading from MSR */
>>> - eptp = VMX_EPT_DEFAULT_MT |
>>> - VMX_EPT_DEFAULT_GAW<< VMX_EPT_GAW_EPTP_SHIFT;
>>> + if (cpu_has_vmx_eptp_writeback())
>>> + eptp = VMX_EPT_MT_WRBACK |
>>> + VMX_EPT_DEFAULT_GAW<< VMX_EPT_GAW_EPTP_SHIFT;
>>>
>> I prefer to ensure WB is supported and used as default. Otherwise it
>> would be
>> a big trouble for memory subsystem(to use UC for all memory). Both WB
>> and UC
>> EPT memory types are ensured to be support in hardware.
>>
>> And you can remove VMX_EPT_DEFAULT_MT as well.
>>
>
> I agree, hopefully we never ever see a cpu that doesn't support EPT WB.
OK, seems we don't need to have this concern. :)
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2010-03-26 1:40 UTC | newest]
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2010-03-22 9:06 [PATCH] KMV: VMX: consult IA32_VMX_EPT_VPID_CAP to determine EPT paging-structure memory type Gui Jianfeng
2010-03-22 9:13 ` Sheng Yang
2010-03-23 10:19 ` Avi Kivity
2010-03-26 1:39 ` Gui Jianfeng
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