public inbox for kvm@vger.kernel.org
 help / color / mirror / Atom feed
* [PATCH] KVM: allow bit 10 to be cleared in MSR_IA32_MC4_CTL
@ 2010-03-24 16:46 Andre Przywara
  2010-03-25 12:28 ` Avi Kivity
  0 siblings, 1 reply; 2+ messages in thread
From: Andre Przywara @ 2010-03-24 16:46 UTC (permalink / raw)
  To: avi; +Cc: kvm, Andre Przywara

There is a quirk for AMD K8 CPUs in many Linux kernels (see
arch/x86/kernel/cpu/mcheck/mce.c:__mcheck_cpu_apply_quirks()) that
clears bit 10 in that MCE related MSR. KVM can only cope with all
zeros or all ones, so it will inject a #GP into the guest, which
will let it panic.
So lets add a quirk to the quirk and ignore this single cleared bit.
This fixes -cpu kvm64 on all machines and -cpu host on K8 machines
with some guest Linux kernels.

Signed-off-by: Andre Przywara <andre.przywara@amd.com>
---
 arch/x86/kvm/x86.c |    8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 097ad3a..a58c634 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -910,9 +910,13 @@ static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 		if (msr >= MSR_IA32_MC0_CTL &&
 		    msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
 			u32 offset = msr - MSR_IA32_MC0_CTL;
-			/* only 0 or all 1s can be written to IA32_MCi_CTL */
+			/* only 0 or all 1s can be written to IA32_MCi_CTL
+			 * some Linux kernels though clear bit 10 in bank 4 to
+			 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
+			 * this to avoid an uncatched #GP in the guest
+			 */
 			if ((offset & 0x3) == 0 &&
-			    data != 0 && data != ~(u64)0)
+			    data != 0 && (data | (1 << 10)) != ~(u64)0)
 				return -1;
 			vcpu->arch.mce_banks[offset] = data;
 			break;
-- 
1.6.4



^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] KVM: allow bit 10 to be cleared in MSR_IA32_MC4_CTL
  2010-03-24 16:46 [PATCH] KVM: allow bit 10 to be cleared in MSR_IA32_MC4_CTL Andre Przywara
@ 2010-03-25 12:28 ` Avi Kivity
  0 siblings, 0 replies; 2+ messages in thread
From: Avi Kivity @ 2010-03-25 12:28 UTC (permalink / raw)
  To: Andre Przywara; +Cc: kvm

On 03/24/2010 06:46 PM, Andre Przywara wrote:
> There is a quirk for AMD K8 CPUs in many Linux kernels (see
> arch/x86/kernel/cpu/mcheck/mce.c:__mcheck_cpu_apply_quirks()) that
> clears bit 10 in that MCE related MSR. KVM can only cope with all
> zeros or all ones, so it will inject a #GP into the guest, which
> will let it panic.
> So lets add a quirk to the quirk and ignore this single cleared bit.
> This fixes -cpu kvm64 on all machines and -cpu host on K8 machines
> with some guest Linux kernels.
>    

Applied, thanks.

-- 
error compiling committee.c: too many arguments to function


^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2010-03-25 12:28 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2010-03-24 16:46 [PATCH] KVM: allow bit 10 to be cleared in MSR_IA32_MC4_CTL Andre Przywara
2010-03-25 12:28 ` Avi Kivity

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox