From mboxrd@z Thu Jan 1 00:00:00 1970 From: Avi Kivity Subject: Re: KVM: x86: Push potential exception error code on task switches Date: Thu, 15 Apr 2010 11:41:05 +0300 Message-ID: <4BC6D121.8040607@redhat.com> References: <4BC5B0FB.8020700@siemens.com> <4BC5B38C.2040500@redhat.com> <4BC5B6FE.8060706@siemens.com> <4BC5BA84.8070507@redhat.com> <4BC5BBE1.5070706@siemens.com> <4BC5BE25.8090800@redhat.com> <4BC5C0E0.6000805@siemens.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-15; format=flowed Content-Transfer-Encoding: 7bit Cc: Marcelo Tosatti , kvm , Gleb Natapov To: Jan Kiszka Return-path: Received: from mx1.redhat.com ([209.132.183.28]:37841 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755745Ab0DOIlM (ORCPT ); Thu, 15 Apr 2010 04:41:12 -0400 In-Reply-To: <4BC5C0E0.6000805@siemens.com> Sender: kvm-owner@vger.kernel.org List-ID: On 04/14/2010 04:19 PM, Jan Kiszka wrote: > Avi Kivity wrote: > >> On 04/14/2010 03:58 PM, Jan Kiszka wrote: >> >>>> The TSS descriptor (gate doesn't have a size). But isn't it possible to >>>> have a 32-bit TSS with a 16-bit CS/SS? >>>> >>>> >>> Might be possible, but will cause troubles as the spec says: >>> >>> "The error code is pushed on the stack as a doubleword or word >>> (depending on the default interrupt, trap, or task gate size)." >>> >>> >> My guess is that this is an error and that the 32-bitness of a TSS only >> refers to the format of the TSS, and has nothing to do with the code >> that actually runs. I'll ask Intel about it. Meanwhile this can be >> applied, if there's a problem with 16-bit exception handlers running >> through a 32-bit task referenced by a task gate in the IDT, it can be >> fixed later. >> > Go ahead. But architecturally this looks fairly consistent to me as the > processor simply derives the error code width from the corresponding > entry in the IDT. > You are correct (though the entry isn't in the IDT!) -- I have a truly marvellous patch that fixes the bug which this signature is too narrow to contain.