From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jan Kiszka Subject: Re: [PATCH] KVM: VMX: Translate interrupt shadow when waiting on NMI window Date: Wed, 21 Apr 2010 16:17:03 +0200 Message-ID: <4BCF08DF.8060709@siemens.com> References: <4B7A625C.4070803@siemens.com> <20100216100057.GC2995@redhat.com> <4B7A6D9A.5030900@siemens.com> <20100216100635.GE2995@redhat.com> <4B7A7015.6000802@siemens.com> <20100216101705.GG2995@redhat.com> <4B7A72FB.8020709@siemens.com> <20100216103235.GH2995@redhat.com> <4B7A755B.80009@siemens.com> <20100216103816.GI2995@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: Avi Kivity , Marcelo Tosatti , kvm To: Gleb Natapov Return-path: Received: from david.siemens.de ([192.35.17.14]:17388 "EHLO david.siemens.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754908Ab0DUORZ (ORCPT ); Wed, 21 Apr 2010 10:17:25 -0400 In-Reply-To: <20100216103816.GI2995@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: Gleb Natapov wrote: > On Tue, Feb 16, 2010 at 11:37:15AM +0100, Jan Kiszka wrote: >> Gleb Natapov wrote: >>> On Tue, Feb 16, 2010 at 11:27:07AM +0100, Jan Kiszka wrote: >>>> Gleb Natapov wrote: >>>>> On Tue, Feb 16, 2010 at 11:14:45AM +0100, Jan Kiszka wrote: >>>>>> Gleb Natapov wrote: >>>>>>> On Tue, Feb 16, 2010 at 11:04:10AM +0100, Jan Kiszka wrote: >>>>>>>> Gleb Natapov wrote: >>>>>>>>> On Tue, Feb 16, 2010 at 10:16:12AM +0100, Jan Kiszka wrote: >>>>>>>>>> Found while browsing Xen code: While we assume that the STI interrupt >>>>>>>>>> shadow also inplies virtual NMI blocking, some processors may have a >>>>>>>>>> different opinion (SDM 3: 22.3). To avoid misunderstandings that would >>>>>>>>>> cause endless VM entry attempts, translate STI into MOV SS blocking when >>>>>>>>>> requesting the NMI window. >>>>>>>>>> >>>>>>>>> Why not just remove "block by STI" check in vmx_nmi_allowed()? IIRC this >>>>>>>>> is documented that on some CPUs STI does not block NMI. >>>>>>>>> >>>>>>>> Probably because we will stumble and fall on those CPUs that do care. >>>>>>>> >>>>>>> But this defines behaviour of cpu _we_ emulate. So on _our_ cpu NMI will >>>>>>> not be blocked by STI. >>>>>> The host CPU decides if it accepts an NMI injections while >>>>> Are you sure? I haven't found such check during VMENTRY. >>>> I also only find the explicitly stated exclusion of MOV SS blocking vs. >>>> NMI injection. If we can rely on this, removing STI blocking from >>>> vmx_nmi_allowed should suffice. Or, better, can we get an official >>>> confirmation from Intel? >>>> >>> SDM 2b says about STI instruction: >>> The IF flag and the STI and CLI instructions do not prohibit the >>> generation of exceptions and NMI interrupts. NMI interrupts (and SMIs) >>> may be blocked for one macroinstruction following an STI. >> Yes, it's likely that this is the architectural reason for the delayed >> NMI window signaling after STI. Still, we are looking for the >> entry-check logic. >> > Will ask Intel. > Just remembered that there was some open topic... Did your ask? Any answer? Jan -- Siemens AG, Corporate Technology, CT T DE IT 1 Corporate Competence Center Embedded Linux