From mboxrd@z Thu Jan 1 00:00:00 1970 From: Xiao Guangrong Subject: Re: [PATCH v2 0/4] Fix accessed bit tracking Date: Tue, 08 Jun 2010 10:35:24 +0800 Message-ID: <4C0DAC6C.8090201@cn.fujitsu.com> References: <1275894659-17656-1-git-send-email-avi@redhat.com> <4C0CB119.3060903@cn.fujitsu.com> <4C0CB526.9070309@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Cc: Lai Jiangshan , Marcelo Tosatti , kvm@vger.kernel.org To: Avi Kivity Return-path: Received: from cn.fujitsu.com ([222.73.24.84]:51295 "EHLO song.cn.fujitsu.com" rhost-flags-OK-FAIL-OK-OK) by vger.kernel.org with ESMTP id S1750897Ab0FHCiw (ORCPT ); Mon, 7 Jun 2010 22:38:52 -0400 In-Reply-To: <4C0CB526.9070309@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: Avi Kivity wrote: > On 06/07/2010 11:43 AM, Lai Jiangshan wrote: >> Avi Kivity wrote: >> >>> The kvm mmu synchronizes shadow ptes using the mmu lock, however the cpu >>> will happily ignore the lock when setting the accessed bit. This can >>> cause >>> the accessed bit to be lost. Luckily this only results in incorrect >>> page >>> selection for swap. >>> >>> >> Atomic operation is heavy and slow, it hurts performance. >> Incorrect page selection for swap also hurts performance. >> > > We can avoid the exchange in most cases, for example if the new spte has > the accessed bit set (already in the patch set) or if the page is > already marked as accessed, or if we see the old spte has the accessed > bit set (so no race can occur). I'll update the patches to avoid > atomics when possible. Umm, the reason that we need atomics here is to avoid vcpu to update spte when we read A bit form it, so, perhaps we can use below way to avoid atomics completely: - set reserved bit in spte - get A bit form spte - set new spte the worst case is cause vcpu #PF here, but it doesn't matter since the old mapping is already invalid, also need a remote tlb flush later. > > I don't think atomics are that expensive, though, ~20 cycles on modern > processors? > Yes, but atomics are "LOCK" instructions, it can stop multiple cpus runing in parallel.