From mboxrd@z Thu Jan 1 00:00:00 1970 From: Avi Kivity Subject: Re: [PATCH 6/24] Implement reading and writing of VMX MSRs Date: Mon, 14 Jun 2010 11:42:59 +0300 Message-ID: <4C15EB93.6040101@redhat.com> References: <1276431753-nyh@il.ibm.com> <201006131225.o5DCPctX012929@rice.haifa.ibm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: kvm@vger.kernel.org To: "Nadav Har'El" Return-path: Received: from mx1.redhat.com ([209.132.183.28]:1026 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755815Ab0FNJh0 (ORCPT ); Mon, 14 Jun 2010 05:37:26 -0400 In-Reply-To: <201006131225.o5DCPctX012929@rice.haifa.ibm.com> Sender: kvm-owner@vger.kernel.org List-ID: On 06/13/2010 03:25 PM, Nadav Har'El wrote: > When the guest can use VMX instructions (when the "nested" module option is > on), it should also be able to read and write VMX MSRs, e.g., to query about > VMX capabilities. This patch adds this support. > > Signed-off-by: Nadav Har'El > --- > --- .before/arch/x86/kvm/x86.c 2010-06-13 15:01:28.000000000 +0300 > +++ .after/arch/x86/kvm/x86.c 2010-06-13 15:01:28.000000000 +0300 > @@ -702,7 +702,11 @@ static u32 msrs_to_save[] = { > #ifdef CONFIG_X86_64 > MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR, > #endif > - MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA > + MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA, > + MSR_IA32_FEATURE_CONTROL, MSR_IA32_VMX_BASIC, > + MSR_IA32_VMX_PINBASED_CTLS, MSR_IA32_VMX_PROCBASED_CTLS, > + MSR_IA32_VMX_EXIT_CTLS, MSR_IA32_VMX_ENTRY_CTLS, > + MSR_IA32_VMX_PROCBASED_CTLS2, MSR_IA32_VMX_EPT_VPID_CAP, > }; > These are read only from the guest point of view, but we need write support from the host to allow for tuning the features exposed to the guest. > /* > + * If we allow our guest to use VMX instructions, we should also let it use > + * VMX-specific MSRs. > + */ > +static int nested_vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata) > +{ > + u64 vmx_msr = 0; > + u32 vmx_msr_high, vmx_msr_low; > + > + switch (msr_index) { > + case MSR_IA32_FEATURE_CONTROL: > + *pdata = 0; > + break; > + case MSR_IA32_VMX_BASIC: > + /* > + * This MSR reports some information about VMX support of the > + * processor. We should return information about the VMX we > + * emulate for the guest, and the VMCS structure we give it - > + * not about the VMX support of the underlying hardware. Some > + * However, some capabilities of the underlying hardware are > + * used directly by our emulation (e.g., the physical address > + * width), so these are copied from what the hardware reports. > + */ > + *pdata = VMCS12_REVISION | > + (((u64)sizeof(struct vmcs12))<< 32); > + rdmsrl(MSR_IA32_VMX_BASIC, vmx_msr); > +#define VMX_BASIC_64 0x0001000000000000LLU > +#define VMX_BASIC_MEM_TYPE 0x003c000000000000LLU > +#define VMX_BASIC_INOUT 0x0040000000000000LLU > Please move those defines (with longer names) to msr-index.h. > + *pdata |= vmx_msr& > + (VMX_BASIC_64 | VMX_BASIC_MEM_TYPE | VMX_BASIC_INOUT); > + break; > +#define CORE2_PINBASED_CTLS_MUST_BE_ONE 0x00000016 > +#define MSR_IA32_VMX_TRUE_PINBASED_CTLS 0x48d > + case MSR_IA32_VMX_TRUE_PINBASED_CTLS: > + case MSR_IA32_VMX_PINBASED_CTLS: > + vmx_msr_low = CORE2_PINBASED_CTLS_MUST_BE_ONE; > + vmx_msr_high = CORE2_PINBASED_CTLS_MUST_BE_ONE | > + PIN_BASED_EXT_INTR_MASK | > + PIN_BASED_NMI_EXITING | > + PIN_BASED_VIRTUAL_NMIS; > IIRC not all processors support PIN_BASED_VIRTUAL_NMIs. Can we support this feature on hosts that don't have it? -- error compiling committee.c: too many arguments to function