Re: [PATCH 03/17] Unify vendor TSC logic

Jason Wang
2010-06-17T08:03:33Z

Glauber Costa wrote:
> On Wed, Jun 16, 2010 at 04:10:10PM +0800, Jason Wang wrote:
>
>> Zachary Amsden wrote:
>>
>>>
>>> void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
>>> {
>>> + kvm_x86_ops->vcpu_load(vcpu, cpu);
>>> if (unlikely(vcpu->cpu != cpu)) {
>>> + /* Make sure TSC doesn't go backwards */
>>> + s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
>>> + native_read_tsc() - vcpu->arch.last_host_tsc;
>>> + if (tsc_delta < 0 || check_tsc_unstable())
>>>
>>>
>> It's better to do the adjustment also when tsc_delta > 0
>>
> And why do you think so? Doing it on tsc_delta > 0 would force us to adjust
> at every entry but the first. And I guess we want to adjust as few times as
> we can.
>
>
This is not strange and is what current SVM code does. If we do not do
this, guest may see a jump in the value of TSC when tsc_delta > 0.
> For example, we would adjust on every cpu bounce even for machines that has
> a perfectly sync tsc. This could introduce an error not present before.
>
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