From mboxrd@z Thu Jan 1 00:00:00 1970 From: Avi Kivity Subject: Re: [PATCH] x86 emulator: Add IRET instruction Date: Mon, 26 Jul 2010 12:00:48 +0300 Message-ID: <4C4D4EC0.9070804@redhat.com> References: <1280085618-27368-1-git-send-email-m.gamal005@gmail.com> <4C4CCFD0.6090203@redhat.com> <4C4D4BB7.6010309@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: Mohammed Gamal , mtosatti@redhat.com, kvm@vger.kernel.org To: Paolo Bonzini Return-path: Received: from mx1.redhat.com ([209.132.183.28]:13659 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752338Ab0GZJAw (ORCPT ); Mon, 26 Jul 2010 05:00:52 -0400 In-Reply-To: <4C4D4BB7.6010309@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On 07/26/2010 11:47 AM, Paolo Bonzini wrote: >> I don't think this is needed. The temp_eflags value is assigned >> directly to eflags if we're operand size is 16 bits. At least that's >> what the Intel manual says! > > > That's fine, but please make sure that > > mov %sp, %bp > orw $2, 4(%bp) > iret > > followed at return site by > > pushf > popw %ax > > does not set bit 1 in %ax. That's the important point (also see how=20 > emulate_popf avoids magic hex constants). Moreover, vmx will fail the next entry if this is not done. 23.3.1.4 sa= ys: > RFLAGS. > =97 Reserved bits 63:22 (bits 31:22 on processors that do not support= =20 > Intel 64 > architecture), bit 15, bit 5 and bit 3 must be 0 in the field, and=20 > reserved bit 1 > must be 1. Looks like a note is missing in the manual. I'll alert the authors. --=20 error compiling committee.c: too many arguments to function