Re: [PATCH 1/4] x86: Fix misnamed AMD CPUID feature bit

[Avi Kivity <avi@redhat.com>]

  On 09/03/2010 12:27 PM, Andre Przywara wrote:
> The AMD SSE5 feature set as-it has been replaced by some extensions
> to the AVX instruction set. Thus the bit formerly advertised as SSE5
> is re-used for one of these extensions (XOP).
> Although this changes the /proc/cpuinfo output, it is not user visible, as
> there are no CPUs (yet) having this feature.
> To avoid confusion this should be added to the stable series, too.
>
>
>
> diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
> index 781a50b..c9c73d8 100644
> --- a/arch/x86/include/asm/cpufeature.h
> +++ b/arch/x86/include/asm/cpufeature.h
> @@ -152,7 +152,7 @@
>   #define X86_FEATURE_3DNOWPREFETCH (6*32+ 8) /* 3DNow prefetch instructions */
>   #define X86_FEATURE_OSVW	(6*32+ 9) /* OS Visible Workaround */
>   #define X86_FEATURE_IBS		(6*32+10) /* Instruction Based Sampling */
> -#define X86_FEATURE_SSE5	(6*32+11) /* SSE-5 */
> +#define X86_FEATURE_XOP		(6*32+11) /* extended AVX instructions */
>   #define X86_FEATURE_SKINIT	(6*32+12) /* SKINIT/STGI instructions */
>   #define X86_FEATURE_WDT		(6*32+13) /* Watchdog timer */
>   #define X86_FEATURE_NODEID_MSR	(6*32+19) /* NodeId MSR */

Even with the -stable update, there may be distributions which have 
kernels with the old name.  That means userspace would need to look for 
both names if it wants to be sure.

-- 
error compiling committee.c: too many arguments to function