[PATCH] Emulate MSR_EBC_FREQUENCY_ID

[PATCH] Emulate MSR_EBC_FREQUENCY_ID

[Jes.Sorensen]

From: Jes Sorensen <Jes.Sorensen@redhat.com>

Some operating systems store data about the host processor at the
time of installation, and when booted on a more uptodate cpu tries
to read MSR_EBC_FREQUENCY_ID. This has been found with XP.

Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
---
 arch/x86/include/asm/msr-index.h |    1 +
 arch/x86/kvm/x86.c               |    8 ++++++++
 2 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 986f779..83c4bb1 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -198,6 +198,7 @@
 #define MSR_IA32_TSC			0x00000010
 #define MSR_IA32_PLATFORM_ID		0x00000017
 #define MSR_IA32_EBL_CR_POWERON		0x0000002a
+#define MSR_EBC_FREQUENCY_ID		0x0000002c
 #define MSR_IA32_FEATURE_CONTROL        0x0000003a
 
 #define FEATURE_CONTROL_LOCKED				(1<<0)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index f47db25..78fa8a0 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1641,6 +1641,14 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 	case MSR_K8_INT_PENDING_MSG:
 	case MSR_AMD64_NB_CFG:
 	case MSR_FAM10H_MMIO_CONF_BASE:
+		/*
+		 * MSR_EBC_FREQUENCY_ID
+		 * Conservative value valid for even the basic CPU models.
+		 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
+		 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
+		 * and 266MHz for model 3, or 4.
+		 */
+	case MSR_EBC_FREQUENCY_ID:
 		data = 0;
 		break;
 	case MSR_MTRRcap:
-- 
1.7.1

Re: [PATCH] Emulate MSR_EBC_FREQUENCY_ID

[Avi Kivity]

  On 09/09/2010 10:33 AM, Jes.Sorensen@redhat.com wrote:
> From: Jes Sorensen<Jes.Sorensen@redhat.com>
>
> Some operating systems store data about the host processor at the
> time of installation, and when booted on a more uptodate cpu tries
> to read MSR_EBC_FREQUENCY_ID. This has been found with XP.
>
>
> index f47db25..78fa8a0 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -1641,6 +1641,14 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
>   	case MSR_K8_INT_PENDING_MSG:
>   	case MSR_AMD64_NB_CFG:
>   	case MSR_FAM10H_MMIO_CONF_BASE:
> +		/*
> +		 * MSR_EBC_FREQUENCY_ID
> +		 * Conservative value valid for even the basic CPU models.
> +		 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
> +		 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
> +		 * and 266MHz for model 3, or 4.
> +		 */
> +	case MSR_EBC_FREQUENCY_ID:
>   		data = 0;
>   		break;
>   	case MSR_MTRRcap:

 From the spec:

> 31:24 Core Clock Frequency to System
>       Bus Frequency Ratio. (R)
>       The processor core clock
>       frequency to system bus
>       frequency ratio observed at the
>       de-assertion of the reset pin.

A frequency ratio of 0 might be unexpected by some guests.


-- 
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.

Re: [PATCH] Emulate MSR_EBC_FREQUENCY_ID

[Jes Sorensen]

On 09/09/10 10:12, Avi Kivity wrote:
> From the spec:
> 
>> 31:24 Core Clock Frequency to System
>>       Bus Frequency Ratio. (R)
>>       The processor core clock
>>       frequency to system bus
>>       frequency ratio observed at the
>>       de-assertion of the reset pin.
> 
> A frequency ratio of 0 might be unexpected by some guests.

Problem with that one is that it is only for CPU models 2, 3, 4, 6.
I haven't found a way to distinguish CPU models from within KVM, but
maybe I am blind?

Bits 31:24 are invalid on models 0 and 1.

Cheers,
Jes

Re: [PATCH] Emulate MSR_EBC_FREQUENCY_ID

[Jes Sorensen]

On 09/09/10 10:29, Jes Sorensen wrote:
> On 09/09/10 10:12, Avi Kivity wrote:
>> From the spec:
>>
>>> 31:24 Core Clock Frequency to System
>>>       Bus Frequency Ratio. (R)
>>>       The processor core clock
>>>       frequency to system bus
>>>       frequency ratio observed at the
>>>       de-assertion of the reset pin.
>>
>> A frequency ratio of 0 might be unexpected by some guests.
> 
> Problem with that one is that it is only for CPU models 2, 3, 4, 6.
> I haven't found a way to distinguish CPU models from within KVM, but
> maybe I am blind?
> 
> Bits 31:24 are invalid on models 0 and 1.

Actually scratch that - the problem is that we are trying to emulate the
MSR because the guest thinks it's valid on the old CPU. However since we
don't know which CPU model the guest was expecting, there really isn't a
valid answer. Setting bits 31:24 to a divisor or 1 would probably be
safe, but there is no guarantee that other guests might not expect the
MSR to return 0 in those bits for other cases.

I can spin a patch that does that, I am just not convinced it's any
safer. Let me know what you prefer.

Jes