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From: Avi Kivity <avi@redhat.com>
To: "Nadav Har'El" <nyh@il.ibm.com>
Cc: kvm@vger.kernel.org, gleb@redhat.com
Subject: Re: [PATCH 20/27] nVMX: Deciding if L0 or L1 should handle an L2 exit
Date: Wed, 20 Oct 2010 16:57:16 +0200	[thread overview]
Message-ID: <4CBF034C.6040702@redhat.com> (raw)
In-Reply-To: <4CBEDCEA.1020507@redhat.com>

  On 10/20/2010 02:13 PM, Avi Kivity wrote:
>> +    switch (exit_reason) {
>> +    case EXIT_REASON_EXTERNAL_INTERRUPT:
>> +        return 0;
>> +    case EXIT_REASON_EXCEPTION_NMI:
>> +        if (!is_exception(intr_info))
>> +            return 0;
>> +        else if (is_page_fault(intr_info)&&  (!enable_ept))
>> +            return 0;
> +
>
> We may still find out later that the page fault needs to be 
> intercepted by the guest, yes?
>
>> +        return (vmcs12->exception_bitmap&
>> +                (1u<<  (intr_info&  INTR_INFO_VECTOR_MASK)));
>> +    case EXIT_REASON_EPT_VIOLATION:
>> +        return 0;
>> +    case EXIT_REASON_INVLPG:
>> +        return (vmcs12->cpu_based_vm_exec_control&
>> +                CPU_BASED_INVLPG_EXITING);
>> +    case EXIT_REASON_MSR_READ:
>> +    case EXIT_REASON_MSR_WRITE:
>> +        return nested_vmx_exit_handled_msr(vcpu, vmcs12, exit_reason);
>> +    case EXIT_REASON_CR_ACCESS:
>> +        return nested_vmx_exit_handled_cr(vcpu, vmcs12);
>> +    case EXIT_REASON_DR_ACCESS:
>> +        return (vmcs12->cpu_based_vm_exec_control&
>> +                CPU_BASED_MOV_DR_EXITING);
>> +    default:
>> +        /*
>> +         * One particularly interesting case that is covered here is an
>> +         * exit caused by L2 running a VMX instruction. L2 is guest
>> +         * mode in L1's world, and according to the VMX spec running a
>> +         * VMX instruction in guest mode should cause an exit to root
>> +         * mode, i.e., to L1. This is why we need to return r=1 for
>> +         * those exit reasons too. This enables further nesting: Like
>> +         * L0 emulates VMX for L1, we now allow L1 to emulate VMX for
>> +         * L2, who will then be able to run L3.
>> +         */
>> +        return 1;
>
> What about intr/nmi window?
>

Also WBINVD, pause loop exit, rdtsc[p], monitor/mwait, hlt.

It's best to list every exit reason here, so it's easier to review and 
maintain.


-- 
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.


  reply	other threads:[~2010-10-20 14:57 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-10-17 10:03 [PATCH 0/27] nVMX: Nested VMX, v6 Nadav Har'El
2010-10-17 10:04 ` [PATCH 01/27] nVMX: Add "nested" module option to vmx.c Nadav Har'El
2010-10-17 10:04 ` [PATCH 02/27] nVMX: Add VMX and SVM to list of supported cpuid features Nadav Har'El
2010-10-17 10:05 ` [PATCH 03/27] nVMX: Implement VMXON and VMXOFF Nadav Har'El
2010-10-17 12:24   ` Avi Kivity
2010-10-17 12:47     ` Nadav Har'El
2010-10-17 13:07   ` Avi Kivity
2010-10-17 10:05 ` [PATCH 04/27] nVMX: Allow setting the VMXE bit in CR4 Nadav Har'El
2010-10-17 12:31   ` Avi Kivity
2010-10-17 10:06 ` [PATCH 05/27] nVMX: Introduce vmcs12: a VMCS structure for L1 Nadav Har'El
2010-10-17 12:34   ` Avi Kivity
2010-10-17 13:18     ` Nadav Har'El
2010-10-17 13:29       ` Avi Kivity
2010-10-17 10:06 ` [PATCH 06/27] nVMX: Implement reading and writing of VMX MSRs Nadav Har'El
2010-10-17 12:52   ` Avi Kivity
2010-10-17 10:07 ` [PATCH 07/27] nVMX: Decoding memory operands of VMX instructions Nadav Har'El
2010-10-17 10:07 ` [PATCH 08/27] nVMX: Hold a vmcs02 for each vmcs12 Nadav Har'El
2010-10-17 13:00   ` Avi Kivity
2010-10-17 10:08 ` [PATCH 09/27] nVMX: Success/failure of VMX instructions Nadav Har'El
2010-10-17 10:08 ` [PATCH 10/27] nVMX: Implement VMCLEAR Nadav Har'El
2010-10-17 13:05   ` Avi Kivity
2010-10-17 13:25     ` Nadav Har'El
2010-10-17 13:27       ` Avi Kivity
2010-10-17 13:37         ` Nadav Har'El
2010-10-17 14:12           ` Avi Kivity
2010-10-17 14:14             ` Gleb Natapov
2010-10-17 10:09 ` [PATCH 11/27] nVMX: Implement VMPTRLD Nadav Har'El
2010-10-17 10:09 ` [PATCH 12/27] nVMX: Implement VMPTRST Nadav Har'El
2010-10-17 10:10 ` [PATCH 13/27] nVMX: Add VMCS fields to the vmcs12 Nadav Har'El
2010-10-17 13:15   ` Avi Kivity
2010-10-17 10:10 ` [PATCH 14/27] nVMX: Implement VMREAD and VMWRITE Nadav Har'El
2010-10-17 13:25   ` Avi Kivity
2010-10-17 10:11 ` [PATCH 15/27] nVMX: Prepare vmcs02 from vmcs01 and vmcs12 Nadav Har'El
2010-10-17 14:08   ` Avi Kivity
2011-02-08 12:13     ` Nadav Har'El
2011-02-08 12:27       ` Avi Kivity
2011-02-08 12:36         ` Nadav Har'El
2011-02-08 12:39           ` Avi Kivity
2011-02-08 12:27       ` Avi Kivity
2010-10-17 10:11 ` [PATCH 16/27] nVMX: Move register-syncing to a function Nadav Har'El
2010-10-17 10:12 ` [PATCH 17/27] nVMX: Implement VMLAUNCH and VMRESUME Nadav Har'El
2010-10-17 15:06   ` Avi Kivity
2010-10-17 10:12 ` [PATCH 18/27] nVMX: No need for handle_vmx_insn function any more Nadav Har'El
2010-10-17 10:13 ` [PATCH 19/27] nVMX: Exiting from L2 to L1 Nadav Har'El
2010-10-17 15:58   ` Avi Kivity
2010-10-17 10:13 ` [PATCH 20/27] nVMX: Deciding if L0 or L1 should handle an L2 exit Nadav Har'El
2010-10-20 12:13   ` Avi Kivity
2010-10-20 14:57     ` Avi Kivity [this message]
2010-10-17 10:14 ` [PATCH 21/27] nVMX: Correct handling of interrupt injection Nadav Har'El
2010-10-17 10:14 ` [PATCH 22/27] nVMX: Correct handling of exception injection Nadav Har'El
2010-10-17 10:15 ` [PATCH 23/27] nVMX: Correct handling of idt vectoring info Nadav Har'El
2010-10-17 10:15 ` [PATCH 24/27] nVMX: Handling of CR0.TS and #NM for Lazy FPU loading Nadav Har'El
2010-10-17 10:16 ` [PATCH 25/27] nVMX: Additional TSC-offset handling Nadav Har'El
2010-10-19 19:13   ` Zachary Amsden
2010-10-17 10:16 ` [PATCH 26/27] nVMX: Miscellenous small corrections Nadav Har'El
2010-10-17 10:17 ` [PATCH 27/27] nVMX: Documentation Nadav Har'El

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