From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anthony Liguori Subject: Re: [PATCH kvm-unit-tests 2/4] Introduce a C++ wrapper for the kvm APIs Date: Wed, 24 Nov 2010 09:50:35 -0600 Message-ID: <4CED344B.3030000@codemonkey.ws> References: <1290595933-13122-1-git-send-email-avi@redhat.com> <1290595933-13122-3-git-send-email-avi@redhat.com> <50DD1E97-0ECD-41E6-B6F8-1D78AA4A4876@suse.de> <4CED2416.1040102@codemonkey.ws> <20101124154006.GE15111@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: Alexander Graf , Avi Kivity , Marcelo Tosatti , kvm@vger.kernel.org To: Gleb Natapov Return-path: Received: from mail-qy0-f181.google.com ([209.85.216.181]:46035 "EHLO mail-qy0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752885Ab0KXPvZ (ORCPT ); Wed, 24 Nov 2010 10:51:25 -0500 Received: by qyk12 with SMTP id 12so4468218qyk.19 for ; Wed, 24 Nov 2010 07:51:24 -0800 (PST) In-Reply-To: <20101124154006.GE15111@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On 11/24/2010 09:40 AM, Gleb Natapov wrote: > On Wed, Nov 24, 2010 at 08:41:26AM -0600, Anthony Liguori wrote: > >> On 11/24/2010 06:59 AM, Alexander Graf wrote: >> >>> On 24.11.2010, at 11:52, Avi Kivity wrote: >>> >>> >>>> Introduce exception-safe objects for calling system, vm, and vcpu ioctls. >>>> >>>> Signed-off-by: Avi Kivity >>>> >>> FWIW, I still disagree with C++ and believe this code to be hardly readable. >>> >> There's a general prettiness that well written C++ code will have >> over C when there's heavy object modelling. This can be subjective >> but for me, it's fairly significant. >> >> The fact that objects are easily created on the stack and on the >> heap is also pretty significant. When considering device models, we >> struggle today with device composition. >> >> In real hardware, the i8042 (keyboard controller) is actually >> implemented in the PIIX3 which is a chip that is part of the i440fx. >> The i440fx acts as both the memory controller and as the PCI Host >> controller. So you get something that looks like: >> >> class PIIX3 : public PCIDevice >> { >> private: >> I8042 i8042; >> RTC rtc; >> // ... >> }; >> >> > The fact that in physical implementation they sit in the same silicon > does not mean that logically they belong to the same class. PIIX3 > is ISA bridge. It doesn't mean it owns devices on the ISA bus it > provides. The information that you are trying to convey here belongs to > configuration file. Why would we specify a PIIX3 device based on a configuration file? There is only one PIIX3 device in the world. I don't see a lot of need to create arbitrary types of devices. The real world hierarchy matters when you're trying to model I/O dispatch. > Here I go factory design pattern. > I think it's a lot of abstraction for very little gain and leads to bizarreness like treating any platform device as an ISA device. An RTC is *not* an ISA device. It may sit *behind* an ISA bus because the SuperIO chip happens to be on the ISA bus. But on modern systems, the ISA bus has disappeared in favor of the LPC but that doesn't fundamentally change what the RTC is. The problem with what you describe is that there are far fewer devices that actually sit on busses than what QEMU tries to model today. >> class I440FX : public PCIHostController >> { >> I440FX(void) { >> this->slots[1].plug(&this->piix3); // piix3 is always in slot 1 >> } >> >> private: >> Plug slots[32]; // slot 0 is the PMC >> PIIX3 piix3; >> }; >> >> So whereas we have this very complicate machine create function that >> attempts to create and composite all of these devices after the >> fact, when written in C++, partially due to good design, but >> partially due to the fact that the languages forces you to think a >> certain way, you get a tremendous simplification. >> >> > Forcing to think you in certain way does not make you suddenly make good > design decisions (if only programming was so easy). But it makes it even > harder to fix bad decision since suddenly all you design depends on it. > > >> A proper C++ device model turns a vast majority of our device >> creation complexity into a single new I440FX. Then it's just a >> matter of instantiating and plugging the appropriate set of PCI >> devices. >> > That is if you are using code as data. With other design you actually > read I440FX configuration from file and build it from smaller parts. > You see C++ doesn't stop us from arguing what design is correct. > That's fair. I think 90% of what we need is better design. I think a better language only gives us 10%. >> Another area that C++ shines is safety. C++ enables you to inject >> safe versions of things that you really can't do in C. For >> instance, the PIT has three channels but the mask to select a >> channel is two bits. There was a kernel exploit that found a way to >> trick selection of a forth channel because of a missing check. >> >> In C++, you can convert: >> >> PITChannel channnels[3]; >> >> Into: >> >> Array channels; >> >> > Any sane modern language gives you that. Why C++? > Because I don't think we can implement a reasonable device model using a garbage collected language. Garbage collection introduces non-determinism and in QEMU we need to ensure that when we're running in a VCPU context, we exit back to the guest as quickly as possible. Regards, Anthony Liguori