From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anthony Liguori Subject: Re: [PATCH kvm-unit-tests 2/4] Introduce a C++ wrapper for the kvm APIs Date: Wed, 24 Nov 2010 10:43:57 -0600 Message-ID: <4CED40CD.8030503@codemonkey.ws> References: <1290595933-13122-1-git-send-email-avi@redhat.com> <1290595933-13122-3-git-send-email-avi@redhat.com> <50DD1E97-0ECD-41E6-B6F8-1D78AA4A4876@suse.de> <4CED2416.1040102@codemonkey.ws> <20101124154006.GE15111@redhat.com> <4CED344B.3030000@codemonkey.ws> <20101124161204.GF15111@redhat.com> <4CED39DE.3030207@redhat.com> <20101124162153.GA20014@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: Avi Kivity , Alexander Graf , Marcelo Tosatti , kvm@vger.kernel.org To: Gleb Natapov Return-path: Received: from mail-qy0-f181.google.com ([209.85.216.181]:33653 "EHLO mail-qy0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753051Ab0KXQo1 (ORCPT ); Wed, 24 Nov 2010 11:44:27 -0500 Received: by qyk12 with SMTP id 12so4548748qyk.19 for ; Wed, 24 Nov 2010 08:44:27 -0800 (PST) In-Reply-To: <20101124162153.GA20014@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On 11/24/2010 10:21 AM, Gleb Natapov wrote: > On Wed, Nov 24, 2010 at 06:14:22PM +0200, Avi Kivity wrote: > >> On 11/24/2010 06:12 PM, Gleb Natapov wrote: >> >>>> Why would we specify a PIIX3 device based on a configuration file? >>>> There is only one PIIX3 device in the world. I don't see a lot of >>>> need to create arbitrary types of devices. >>>> >>>> >>> Why deny this flexibility from those who need it for modelling >>> different HW? >>> >> The various components exist and can be reused. >> >> > So you are saying lets use code as data for some and config files for > others. If you have support for building chipsets from data why not > simply have 440fx.cfg somewhere? Besides what qemu provides no is not > stock PIIX3. We have parts of PIIX4 for power management. > > >>> Besides, as I said, PIIX3 is ISA bridge and this >>> is what class should implement. >>> >> Isn't it an ISA bridge + a few ISA devices? >> >> > Why? Because they happen to be on the same silicon? So then in SoC > all devices are in cpu? > They *aren't* ISA devices. Look at the PIIX3 spec. All of the ports for these devices are positively decoded and not sent over the ISA bus. You could model them as being behind the ISA bus but you could also model them as being behind the PCI bus. Regards, Anthony Liguori >>> We have fw_cfg on ISA bus too >>> which does not exits on real HW and we may want to have other >>> devices. We should be able to add them without changing PIIX3 >>> class. >>> >> fw_cfg should certainly not be a member of PIIX3. >> >> > It is really not much different from others. > > -- > Gleb. >