From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anthony Liguori Subject: Re: [PATCH kvm-unit-tests 2/4] Introduce a C++ wrapper for the kvm APIs Date: Wed, 24 Nov 2010 12:53:00 -0600 Message-ID: <4CED5F0C.6000302@codemonkey.ws> References: <1290595933-13122-1-git-send-email-avi@redhat.com> <1290595933-13122-3-git-send-email-avi@redhat.com> <50DD1E97-0ECD-41E6-B6F8-1D78AA4A4876@suse.de> <4CED2416.1040102@codemonkey.ws> <20101124154006.GE15111@redhat.com> <4CED344B.3030000@codemonkey.ws> <20101124161204.GF15111@redhat.com> <4CED3FE5.4000801@codemonkey.ws> <20101124173345.GI20014@redhat.com> <4CED569C.7030008@codemonkey.ws> <20101124183409.GC21364@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: Alexander Graf , Avi Kivity , Marcelo Tosatti , kvm@vger.kernel.org To: Gleb Natapov Return-path: Received: from mail-qy0-f181.google.com ([209.85.216.181]:47943 "EHLO mail-qy0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753337Ab0KXSxc (ORCPT ); Wed, 24 Nov 2010 13:53:32 -0500 Received: by qyk12 with SMTP id 12so98543qyk.19 for ; Wed, 24 Nov 2010 10:53:32 -0800 (PST) In-Reply-To: <20101124183409.GC21364@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On 11/24/2010 12:34 PM, Gleb Natapov wrote: >>>> Right, and real HW does composition in the PIIX3 device. So let's >>>> not regret making everything an ISA device later. >>>> >>>> >>> You design by packaging not functionality? >>> >> No, if you want the ability to remove devices from the PIIX3, fine, >> but don't call them ISA devices just for the sake of it. >> > PIIX3 may be totally implemented in FPGA code. I do not care. This is > implementation detail. What important is that it provide the same > functionality as ISA devices in the first IBM PC. That is why they are > ISA devices and should be modeled as such. Otherwise you will have to > redesign everything when you'll want to move to another chipset > emulation that uses new and improved SuperIO-2XT technology inside. > The ISA slots (technically XT) were basically daughter board connectors. They routed pins from a bunch of devices on the motherboard to external daughterboards. This included the *unused* IRQ pins, the left over DMA channels, etc. Everything else was hard wired. The XT connector only exposes pins 3, 4, 5, 6, and 7. The ISA connector then added IRQs 10, 11, 12, 14, and 15. So if a device uses IRQ 0, 1, 2, 8, 9, or 13, it's by definition not an ISA device. It was hard wired on the motherboard. >> I'm using C++ to understand how to make a correct design model. The >> C++ part is only 10% of what I care about. >> >> I agree that Avi's example is not a strong justification for C++ and >> I also agree that it's uglier than the same implementation in C. >> >> > I am glad we agree on that :) > Regards, Anthony Liguori >>>> very few memory allocations. This is largely due to the fact that I >>>> don't overly abstract busses and rely on simple composition where >>>> appropriate. >>>> >>> I am not sure you can write useful program with few memory allocations. >>> >> Ultimately, you're allocating the same amount of memory, but in >> fewer steps (because of static composition). >> >> Regards, >> >> Anthony Liguori >> >> >>>> Plus, with tr1::smart_pointers, you can be leak free without every >>>> worrying about explicit freeing. There are, of course, >>>> possibilities of having circular references but it's not too hard to >>>> avoid that in practice. >>>> >>>> >>> -- >>> Gleb. >>> > -- > Gleb. >