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From: Avi Kivity <avi@redhat.com>
To: "Nadav Har'El" <nyh@il.ibm.com>
Cc: kvm@vger.kernel.org, gleb@redhat.com
Subject: Re: [PATCH 07/28] nVMX: Decoding memory operands of VMX instructions
Date: Thu, 09 Dec 2010 13:08:37 +0200	[thread overview]
Message-ID: <4D00B8B5.8070207@redhat.com> (raw)
In-Reply-To: <201012081703.oB8H3XbJ008622@rice.haifa.ibm.com>

On 12/08/2010 07:03 PM, Nadav Har'El wrote:
> This patch includes a utility function for decoding pointer operands of VMX
> instructions issued by L1 (a guest hypervisor)
>
> Signed-off-by: Nadav Har'El<nyh@il.ibm.com>
> ---
>   arch/x86/kvm/vmx.c |   59 +++++++++++++++++++++++++++++++++++++++++++
>   arch/x86/kvm/x86.c |    3 +-
>   arch/x86/kvm/x86.h |    3 ++
>   3 files changed, 64 insertions(+), 1 deletion(-)
>
> --- .before/arch/x86/kvm/x86.c	2010-12-08 18:56:49.000000000 +0200
> +++ .after/arch/x86/kvm/x86.c	2010-12-08 18:56:49.000000000 +0200
> @@ -3688,7 +3688,7 @@ static int kvm_fetch_guest_virt(gva_t ad
>   					  exception);
>   }
>
> -static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
> +int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
>   			       struct kvm_vcpu *vcpu,
>   			       struct x86_exception *exception)
>   {
> @@ -3696,6 +3696,7 @@ static int kvm_read_guest_virt(gva_t add
>   	return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
>   					  exception);
>   }
> +EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
>
>   static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
>   				      struct kvm_vcpu *vcpu,
> --- .before/arch/x86/kvm/x86.h	2010-12-08 18:56:49.000000000 +0200
> +++ .after/arch/x86/kvm/x86.h	2010-12-08 18:56:49.000000000 +0200
> @@ -74,6 +74,9 @@ void kvm_before_handle_nmi(struct kvm_vc
>   void kvm_after_handle_nmi(struct kvm_vcpu *vcpu);
>   int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq);
>
> +int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
> +		struct kvm_vcpu *vcpu, struct x86_exception *exception);
> +
>   void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data);
>
>   #endif
> --- .before/arch/x86/kvm/vmx.c	2010-12-08 18:56:49.000000000 +0200
> +++ .after/arch/x86/kvm/vmx.c	2010-12-08 18:56:49.000000000 +0200
> @@ -3936,6 +3936,65 @@ static int handle_vmoff(struct kvm_vcpu
>   }
>
>   /*
> + * Decode the memory-address operand of a vmx instruction, as recorded on an
> + * exit caused by such an instruction (run by a guest hypervisor).
> + * On success, returns 0. When the operand is invalid, returns 1 and throws
> + * #UD or #GP.
> + */
> +static int get_vmx_mem_address(struct kvm_vcpu *vcpu,
> +				 unsigned long exit_qualification,
> +				 u32 vmx_instruction_info, gva_t *ret)
> +{
> +	/*
> +	 * According to Vol. 3B, "Information for VM Exits Due to Instruction
> +	 * Execution", on an exit, vmx_instruction_info holds most of the
> +	 * addressing components of the operand. Only the displacement part
> +	 * is put in exit_qualification (see 3B, "Basic VM-Exit Information").
> +	 * For how an actual address is calculated from all these components,
> +	 * refer to Vol. 1, "Operand Addressing".
> +	 */
> +	int  scaling = vmx_instruction_info&  3;
> +	int  addr_size = (vmx_instruction_info>>  7)&  7;
> +	bool is_reg = vmx_instruction_info&  (1u<<  10);
> +	int  seg_reg = (vmx_instruction_info>>  15)&  7;
> +	int  index_reg = (vmx_instruction_info>>  18)&  0xf;
> +	bool index_is_valid = !(vmx_instruction_info&  (1u<<  22));
> +	int  base_reg       = (vmx_instruction_info>>  23)&  0xf;
> +	bool base_is_valid  = !(vmx_instruction_info&  (1u<<  27));
> +
> +	if (is_reg) {
> +		kvm_queue_exception(vcpu, UD_VECTOR);
> +		return 1;
> +	}
> +
> +	switch (addr_size) {
> +	case 1: /* 32 bit. high bits are undefined according to the spec: */
> +		exit_qualification&= 0xffffffff;

Best to do this at the end, on *ret, so that segment base + offset is 
subject to truncation.

> +		break;
> +	case 2: /* 64 bit */
> +		break;
> +	default: /* 16 bit */
> +		return 1;
> +	}
> +
> +	/* Addr = segment_base + offset */
> +	/* offset = base + [index * scale] + displacement */
> +	*ret = vmx_get_segment_base(vcpu, seg_reg);
> +	if (base_is_valid)
> +		*ret += kvm_register_read(vcpu, base_reg);
> +	if (index_is_valid)
> +		*ret += kvm_register_read(vcpu, index_reg)<<scaling;
> +	*ret += exit_qualification; /* holds the displacement */
> +	/*
> +	 * TODO: throw #GP (and return 1) in various cases that the VM*
> +	 * instructions require it - e.g., offset beyond segment limit,
> +	 * unusable or unreadable/unwritable segment, non-canonical 64-bit
> +	 * address, and so on. Currently these are not checked.
> +	 */
> +	return 0;
> +}
> +

-- 
error compiling committee.c: too many arguments to function


  reply	other threads:[~2010-12-09 11:08 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-12-08 16:59 [PATCH 0/28] nVMX: Nested VMX, v7 Nadav Har'El
2010-12-08 17:00 ` [PATCH 01/28] nVMX: Add "nested" module option to vmx.c Nadav Har'El
2010-12-08 17:00 ` [PATCH 02/28] nVMX: Add VMX and SVM to list of supported cpuid features Nadav Har'El
2010-12-09 11:38   ` Joerg Roedel
2010-12-15 13:25     ` Nadav Har'El
2010-12-08 17:01 ` [PATCH 03/28] nVMX: Implement VMXON and VMXOFF Nadav Har'El
2010-12-08 17:02 ` [PATCH 04/28] nVMX: Allow setting the VMXE bit in CR4 Nadav Har'El
2010-12-08 17:02 ` [PATCH 05/28] nVMX: Introduce vmcs12: a VMCS structure for L1 Nadav Har'El
2010-12-08 17:03 ` [PATCH 06/28] nVMX: Implement reading and writing of VMX MSRs Nadav Har'El
2010-12-09 11:04   ` Avi Kivity
2010-12-08 17:03 ` [PATCH 07/28] nVMX: Decoding memory operands of VMX instructions Nadav Har'El
2010-12-09 11:08   ` Avi Kivity [this message]
2010-12-08 17:04 ` [PATCH 08/28] nVMX: Hold a vmcs02 for each vmcs12 Nadav Har'El
2010-12-09 12:41   ` Avi Kivity
2010-12-08 17:04 ` [PATCH 09/28] nVMX: Add VMCS fields to the vmcs12 Nadav Har'El
2010-12-09 12:43   ` Avi Kivity
2010-12-10 12:10     ` Nadav Har'El
2010-12-08 17:05 ` [PATCH 10/28] nVMX: Success/failure of VMX instructions Nadav Har'El
2010-12-08 17:05 ` [PATCH 11/28] nVMX: Implement VMCLEAR Nadav Har'El
2010-12-08 17:06 ` [PATCH 12/28] nVMX: Implement VMPTRLD Nadav Har'El
2010-12-08 17:06 ` [PATCH 13/28] nVMX: Implement VMPTRST Nadav Har'El
2010-12-08 17:07 ` [PATCH 14/28] nVMX: Implement VMREAD and VMWRITE Nadav Har'El
2010-12-08 17:07 ` [PATCH 15/28] nVMX: Prepare vmcs02 from vmcs01 and vmcs12 Nadav Har'El
2010-12-08 17:08 ` [PATCH 16/28] nVMX: Move register-syncing to a function Nadav Har'El
2010-12-08 17:08 ` [PATCH 17/28] nVMX: Implement VMLAUNCH and VMRESUME Nadav Har'El
2010-12-08 17:09 ` [PATCH 18/28] nVMX: No need for handle_vmx_insn function any more Nadav Har'El
2010-12-08 17:09 ` [PATCH 19/28] nVMX: Exiting from L2 to L1 Nadav Har'El
2010-12-09 12:55   ` Avi Kivity
2010-12-08 17:10 ` [PATCH 20/28] nVMX: Deciding if L0 or L1 should handle an L2 exit Nadav Har'El
2010-12-08 17:10 ` [PATCH 21/28] nVMX: Correct handling of interrupt injection Nadav Har'El
2010-12-08 17:11 ` [PATCH 22/28] nVMX: Correct handling of exception injection Nadav Har'El
2010-12-08 17:11 ` [PATCH 23/28] nVMX: Correct handling of idt vectoring info Nadav Har'El
2010-12-08 17:12 ` [PATCH 24/28] nVMX: Handling of CR0 and CR4 modifying instructions Nadav Har'El
2010-12-09 13:19   ` Avi Kivity
2010-12-08 17:12 ` [PATCH 25/28] nVMX: Further fixes for lazy FPU loading Nadav Har'El
2010-12-09 13:05   ` Avi Kivity
2010-12-08 17:13 ` [PATCH 26/28] nVMX: Additional TSC-offset handling Nadav Har'El
2010-12-08 17:13 ` [PATCH 27/28] nVMX: Miscellenous small corrections Nadav Har'El
2010-12-08 17:14 ` [PATCH 28/28] nVMX: Documentation Nadav Har'El
2010-12-09 12:44 ` [PATCH 0/28] nVMX: Nested VMX, v7 Avi Kivity

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