From mboxrd@z Thu Jan 1 00:00:00 1970 From: Avi Kivity Subject: Re: [Patch v4 2/4] Add SMEP handling when setting CR4 Date: Tue, 31 May 2011 22:03:26 +0300 Message-ID: <4DE53B7E.4070403@redhat.com> References: <5D8008F58939784290FAB48F5497519844E9278011@shsmsx502.ccr.corp.intel.com> <20110531175232.GA2721@amt.cnet> <4DE52DEF.2000009@redhat.com> <20110531184827.GA4376@amt.cnet> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: "Yang, Wei Y" , "kvm@vger.kernel.org" To: Marcelo Tosatti Return-path: Received: from mx1.redhat.com ([209.132.183.28]:50528 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757975Ab1EaTDb (ORCPT ); Tue, 31 May 2011 15:03:31 -0400 In-Reply-To: <20110531184827.GA4376@amt.cnet> Sender: kvm-owner@vger.kernel.org List-ID: On 05/31/2011 09:48 PM, Marcelo Tosatti wrote: > On Tue, May 31, 2011 at 09:05:35PM +0300, Avi Kivity wrote: > > >> if (is_long_mode(vcpu)) { > > >> if (!(cr4& X86_CR4_PAE)) > > >> return 1; > > > > > >A new field in vcpu->arch.mmu.base_role for smep is required > > >for shadow MMU (similar to nxe). > > > > I plan to add that with my cr0.wp=0 fixup (it's only needed there, right?) > > Sptes instantiated when cr4.smep = 0 should not be used when cr4.smep = > 1, so no (unlikely that guest kernel executes user=1 code anyway, but > for consistency with other base_role flags). Why not? The sptes are interpreted exactly the same. sptes are interpreted differently when efer.nxe=1 - if bit 63 is set, it will fault when nxe=0 and will not fault when nxe=1 (for non-fetch accesses). So we can't share those sptes. > OK then, you'll fix that. > Sure. I'll post the patches as soon as this hits 'next'. -- I have a truly marvellous patch that fixes the bug which this signature is too narrow to contain.