From mboxrd@z Thu Jan 1 00:00:00 1970 From: Avi Kivity Subject: Re: [PATCH 0/3] Enable RDWRGSFS feature support for KVM Date: Tue, 14 Jun 2011 15:30:56 +0300 Message-ID: <4DF75480.2040900@redhat.com> References: <1308053419-9953-1-git-send-email-wei.y.yang@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: kvm@vger.kernel.org, the arch/x86 maintainers To: "Yang, Wei" Return-path: Received: from mx1.redhat.com ([209.132.183.28]:20483 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750912Ab1FNMbd (ORCPT ); Tue, 14 Jun 2011 08:31:33 -0400 In-Reply-To: <1308053419-9953-1-git-send-email-wei.y.yang@intel.com> Sender: kvm-owner@vger.kernel.org List-ID: On 06/14/2011 03:10 PM, Yang, Wei wrote: > This patch enalbes RDWRGSFS feature to KVM guests. > > Write/read FS/GS base instructions enable user level code > to read/write FS& GS segment base registers for thread > local storage. > Patches look good, but something appears missing - usually when an instruction is enabled by a cr4 bit, there is an additional cpuid bit that gets turned on, so userspace can tell if it is safe to use the instruction. Is it not the case here? Unrelated: what about enabling it for host userspace? You'll need to modify IST interrupt entry points (NMI/MCE etc) not to look at the value of gsbase, but it shouldn't be too difficult. -- error compiling committee.c: too many arguments to function