From mboxrd@z Thu Jan 1 00:00:00 1970 From: Avi Kivity Subject: Re: [PATCH 0/5] perf support for amd guest/host-only bits v2 Date: Sun, 19 Jun 2011 12:01:51 +0300 Message-ID: <4DFDBAFF.4010202@redhat.com> References: <1308317854-27398-1-git-send-email-joerg.roedel@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: Peter Zijlstra , Paul Mackerras , Ingo Molnar , Arnaldo Carvalho de Melo , linux-kernel@vger.kernel.org, kvm@vger.kernel.org To: Joerg Roedel Return-path: In-Reply-To: <1308317854-27398-1-git-send-email-joerg.roedel@amd.com> Sender: linux-kernel-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On 06/17/2011 04:37 PM, Joerg Roedel wrote: > Hi, > > this is the second version of the patch-set to support the AMD > guest-/host only bits in the performance counter MSRs. Due to lack of > time I havn't looked into emulating support for this feature on Intel or > other architectures, but the other comments should be worked in. The > changes to v1 include: I'll be happy to add Intel support, it's needed for my guest pmu patchset anyway. -- error compiling committee.c: too many arguments to function