From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anthony Liguori Subject: Re: [Qemu-devel] [PATCH 23/23] usb-ohci: convert to MemoryRegion Date: Mon, 25 Jul 2011 15:22:07 -0500 Message-ID: <4E2DD06F.9010707@codemonkey.ws> References: <1311602584-23409-1-git-send-email-avi@redhat.com> <1311602584-23409-24-git-send-email-avi@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org To: Avi Kivity Return-path: Received: from mail-yw0-f46.google.com ([209.85.213.46]:56296 "EHLO mail-yw0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752469Ab1GYUWL (ORCPT ); Mon, 25 Jul 2011 16:22:11 -0400 Received: by ywe9 with SMTP id 9so2483073ywe.19 for ; Mon, 25 Jul 2011 13:22:11 -0700 (PDT) In-Reply-To: <1311602584-23409-24-git-send-email-avi@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On 07/25/2011 09:03 AM, Avi Kivity wrote: > Signed-off-by: Avi Kivity Reviewed-by: Anthony Liguori Regards, Anthony Liguori > --- > hw/usb-ohci.c | 42 +++++++++++++++++------------------------- > 1 files changed, 17 insertions(+), 25 deletions(-) > > diff --git a/hw/usb-ohci.c b/hw/usb-ohci.c > index 8491d59..337b250 100644 > --- a/hw/usb-ohci.c > +++ b/hw/usb-ohci.c > @@ -62,7 +62,7 @@ typedef struct OHCIPort { > typedef struct { > USBBus bus; > qemu_irq irq; > - int mem; > + MemoryRegion mem; > int num_ports; > const char *name; > > @@ -1440,13 +1440,13 @@ static void ohci_port_set_status(OHCIState *ohci, int portnum, uint32_t val) > return; > } > > -static uint32_t ohci_mem_read(void *ptr, target_phys_addr_t addr) > +static uint64_t ohci_mem_read(void *opaque, > + target_phys_addr_t addr, > + unsigned size) > { > - OHCIState *ohci = ptr; > + OHCIState *ohci = opaque; > uint32_t retval; > > - addr&= 0xff; > - > /* Only aligned reads are allowed on OHCI */ > if (addr& 3) { > fprintf(stderr, "usb-ohci: Mis-aligned read\n"); > @@ -1563,11 +1563,12 @@ static uint32_t ohci_mem_read(void *ptr, target_phys_addr_t addr) > return retval; > } > > -static void ohci_mem_write(void *ptr, target_phys_addr_t addr, uint32_t val) > +static void ohci_mem_write(void *opaque, > + target_phys_addr_t addr, > + uint64_t val, > + unsigned size) > { > - OHCIState *ohci = ptr; > - > - addr&= 0xff; > + OHCIState *ohci = opaque; > > /* Only aligned reads are allowed on OHCI */ > if (addr& 3) { > @@ -1697,18 +1698,10 @@ static void ohci_async_cancel_device(OHCIState *ohci, USBDevice *dev) > } > } > > -/* Only dword reads are defined on OHCI register space */ > -static CPUReadMemoryFunc * const ohci_readfn[3]={ > - ohci_mem_read, > - ohci_mem_read, > - ohci_mem_read > -}; > - > -/* Only dword writes are defined on OHCI register space */ > -static CPUWriteMemoryFunc * const ohci_writefn[3]={ > - ohci_mem_write, > - ohci_mem_write, > - ohci_mem_write > +static const MemoryRegionOps ohci_mem_ops = { > + .read = ohci_mem_read, > + .write = ohci_mem_write, > + .endianness = DEVICE_LITTLE_ENDIAN, > }; > > static USBPortOps ohci_port_ops = { > @@ -1764,8 +1757,7 @@ static int usb_ohci_init(OHCIState *ohci, DeviceState *dev, > } > } > > - ohci->mem = cpu_register_io_memory(ohci_readfn, ohci_writefn, ohci, > - DEVICE_LITTLE_ENDIAN); > + memory_region_init_io(&ohci->mem,&ohci_mem_ops, ohci, "ohci", 256); > ohci->localmem_base = localmem_base; > > ohci->name = dev->info->name; > @@ -1799,7 +1791,7 @@ static int usb_ohci_initfn_pci(struct PCIDevice *dev) > ohci->state.irq = ohci->pci_dev.irq[0]; > > /* TODO: avoid cast below by using dev */ > - pci_register_bar_simple(&ohci->pci_dev, 0, 256, 0, ohci->state.mem); > + pci_register_bar_region(&ohci->pci_dev, 0, 0,&ohci->state.mem); > return 0; > } > > @@ -1822,7 +1814,7 @@ static int ohci_init_pxa(SysBusDevice *dev) > /* Cannot fail as we pass NULL for masterbus */ > usb_ohci_init(&s->ohci,&dev->qdev, s->num_ports, s->dma_offset, NULL, 0); > sysbus_init_irq(dev,&s->ohci.irq); > - sysbus_init_mmio(dev, 0x1000, s->ohci.mem); > + sysbus_init_mmio_region(dev,&s->ohci.mem); > > return 0; > }