From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jan Kiszka Subject: qemu-kvm: Role of flush_icache_range on PPC Date: Wed, 28 Sep 2011 16:23:31 +0200 Message-ID: <4E832DE3.40503@siemens.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit Cc: qemu-devel , kvm To: Alexander Graf Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org Sender: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org List-Id: kvm.vger.kernel.org Alex, we have this diff in qemu-kvm: diff --git a/exec.c b/exec.c index c1e045d..f188549 100644 --- a/exec.c +++ b/exec.c @@ -3950,6 +3955,11 @@ void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf, cpu_physical_memory_set_dirty_flags( addr1, (0xff & ~CODE_DIRTY_FLAG)); } + /* qemu doesn't execute guest code directly, but kvm does + therefore flush instruction caches */ + if (kvm_enabled()) + flush_icache_range((unsigned long)ptr, + ((unsigned long)ptr)+l); qemu_put_ram_ptr(ptr); } } else { flush_icache_range() is doing something only on PPC hosts. So do we need this upstream? Jan -- Siemens AG, Corporate Technology, CT T DE IT 1 Corporate Competence Center Embedded Linux