From mboxrd@z Thu Jan 1 00:00:00 1970 From: Christian Borntraeger Subject: Re: [patch 0/3] RFC: provide synchronous registers in kvm_run Date: Thu, 22 Dec 2011 14:17:47 +0100 Message-ID: <4EF32DFB.2080304@de.ibm.com> References: <20111222115646.248800653@de.ibm.com> <4EF32421.8000303@redhat.com> <4EF32747.4050809@de.ibm.com> <4EF3289D.3080903@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: Marcelo Tossati , Carsten Otte , Alexander Graf , Jens Freimann , Cornelia Huck , Heiko Carstens , Martin Schwidefsky , KVM To: Avi Kivity Return-path: Received: from e06smtp10.uk.ibm.com ([195.75.94.106]:50084 "EHLO e06smtp10.uk.ibm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751683Ab1LVNR6 (ORCPT ); Thu, 22 Dec 2011 08:17:58 -0500 Received: from /spool/local by e06smtp10.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 22 Dec 2011 13:17:56 -0000 Received: from d06av11.portsmouth.uk.ibm.com (d06av11.portsmouth.uk.ibm.com [9.149.37.252]) by d06nrmr1407.portsmouth.uk.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id pBMDHnE12244634 for ; Thu, 22 Dec 2011 13:17:49 GMT Received: from d06av11.portsmouth.uk.ibm.com (loopback [127.0.0.1]) by d06av11.portsmouth.uk.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id pBMDHmUV014790 for ; Thu, 22 Dec 2011 06:17:49 -0700 In-Reply-To: <4EF3289D.3080903@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On 22/12/11 13:54, Avi Kivity wrote: >> My main concern was the prefix register (this is a per cpu register that >> defines the address of two pages that are swapped with the pages at 0 for this cpu). >> SMP on s390 is done that way (e.g. interrupt things are stored in page 0 for this cpu) >> The storage that qemu sees is storage without prefix. For architecture compliance >> we actually must check _every_ memory access if it hits the prefix/swpa area and >> the add/subtract the prefix value. > > Those are only memory accesses coming from the cpu, yes? Why does > userspace have to access them at all? I imagine DMA ignores it > completely since it doesn't come from the cpu. Not sure if I got you question...(just ask again if that doesnt aswer it) The prefix page contains HW-defined content (like the PSWs for the different interrupt types) as well as some OS-defined values (for CPU local data structures as well as a place to store information in critical sections) The prefix page (and the swap area) must not be used for device I/O (since it will be broken as you pointed out), but some I/O instructions can and will write status information to the prefix page. For example the channel subsystem driver in Linux will use an area in the prefix page as a store address for some instructions. So let me phrase the above sentence differently: For architecture compliance we actually must check every memory access that is done on behalf of a guest cpu and was not already handled by the host kernel. PS: Most of the things are really handled in the kernel. As you can see, the current paravirtual I/O stack does not need the prefix at all