From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [PATCH v2 0/4] RTC: New logic to emulate RTC Date: Thu, 23 Feb 2012 07:51:52 +0100 Message-ID: <4F45E208.4020101@redhat.com> References: <4F41F91F.7060206@redhat.com> <4F44CF3B.9010208@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: "aliguori@us.ibm.com" , Marcelo Tosatti , Jan Kiszka , "qemu-devel@nongnu.org" , "kvm@vger.kernel.org" To: "Zhang, Yang Z" Return-path: Received: from mail-ee0-f46.google.com ([74.125.83.46]:63664 "EHLO mail-ee0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750715Ab2BWGv6 (ORCPT ); Thu, 23 Feb 2012 01:51:58 -0500 Received: by eekc4 with SMTP id c4so251063eek.19 for ; Wed, 22 Feb 2012 22:51:56 -0800 (PST) In-Reply-To: Sender: kvm-owner@vger.kernel.org List-ID: On 02/23/2012 02:49 AM, Zhang, Yang Z wrote: >> > 6) Setting the clock after 500 ms happens not on every set, but only when moving >> > out of divider reset (register A bits 5-7 moving from 110 or 111 to 010). As far as >> > I can read, SET prevents the registers from changing value, but keeps the internal >> > sub-second counters running. > Do we really need this logic? It sounds like senseless. It doesn't seem hard to do, see my branch. Paolo