From mboxrd@z Thu Jan  1 00:00:00 1970
From: Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v4 4/7] RTC: Set internal millisecond register
 to 500ms when reset divider
Date: Tue, 20 Mar 2012 18:41:19 +0100
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Cc: "Zhang, Yang Z" <yang.z.zhang@intel.com>,
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	"aliguori@us.ibm.com" <aliguori@us.ibm.com>,
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To: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
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Il 20/03/2012 18:39, Stefano Stabellini ha scritto:
> This code is new: does it mean we were not handling divider reset
> correctly before?
> Also if we are trying to handle the DV registers, shouldn't we emulated
> the other RTC frequencies as well? If so, we need a scale factor, in
> addition to an offset to QEMU rtc_clock.

The other frequencies are never used in practice.  But divider reset's
500ms delay can be used in tests.

Paolo