From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jan Kiszka <jan.kiszka@siemens.com>
Subject: Re: [PATCH 2/2] QEMU kvm: Add support to get/set vcpu
 unhalt msr to aid migration
Date: Fri, 23 Mar 2012 09:57:28 +0100
Message-ID: <4F6C3AF8.5050802@siemens.com>
References: <20120323082242.17193.16289.sendpatchset@codeblue>
	<20120323082353.17193.46145.sendpatchset@codeblue>
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Cc: Anthony Liguori <aliguori@us.ibm.com>, KVM <kvm@vger.kernel.org>,
	Marcelo Tosatti <mtosatti@redhat.com>, Qemu-devel <qemu-devel@nongnu.org>,
	Alexander Graf <agraf@suse.de>, Avi Kivity <avi@redhat.com>,
	Srivatsa Vaddagiri <vatsa@linux.vnet.ibm.com>
To: Raghavendra K T <raghavendra.kt@linux.vnet.ibm.com>
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On 2012-03-23 09:23, Raghavendra K T wrote:
> From: Raghavendra K T <raghavendra.kt@linux.vnet.ibm.com>
> 
> MSR_KVM_PV_UNHALT tells whether vcpu is unhalted, which needs to be
> used during migration.

Err, and where is it actually saved to/restored from the vmstate? You
are lacking an extension of the CPU vmstate, preferably via a substate.
See e.g. cpu/async_pf_msr.

> 
> Signed-off-by: Raghavendra K T <raghavendra.kt@linux.vnet.ibm.com>
> ---
> diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> index a1ed3e7..10286a5 100644
> --- a/target-i386/cpu.h
> +++ b/target-i386/cpu.h
> @@ -697,6 +697,7 @@ typedef struct CPUX86State {
>      uint64_t system_time_msr;
>      uint64_t wall_clock_msr;
>      uint64_t async_pf_en_msr;
> +    uint64_t pv_unhalt_msr;
>  
>      uint64_t tsc;
>      uint64_t tsc_deadline;
> diff --git a/target-i386/kvm.c b/target-i386/kvm.c
> index dbebd3a..98b9088 100644
> --- a/target-i386/kvm.c
> +++ b/target-i386/kvm.c
> @@ -62,6 +62,7 @@ static bool has_msr_star;
>  static bool has_msr_hsave_pa;
>  static bool has_msr_tsc_deadline;
>  static bool has_msr_async_pf_en;
> +static bool has_msr_pv_unhalt;
>  static bool has_msr_misc_enable;
>  static int lm_capable_kernel;
>  
> @@ -444,7 +445,7 @@ int kvm_arch_init_vcpu(CPUX86State *env)
>      }
>  
>      has_msr_async_pf_en = c->eax & (1 << KVM_FEATURE_ASYNC_PF);
> -
> +    has_msr_pv_unhalt = c->eax & (1 << KVM_FEATURE_PV_UNHALT);
>      cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused);
>  
>      for (i = 0; i <= limit; i++) {
> @@ -1012,6 +1013,10 @@ static int kvm_put_msrs(CPUX86State *env, int level)
>          if (hyperv_vapic_recommended()) {
>              kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_APIC_ASSIST_PAGE, 0);
>          }
> +        if (has_msr_pv_unhalt) {
> +            kvm_msr_entry_set(&msrs[n++], MSR_KVM_PV_UNHALT,
> +                              env->pv_unhalt_msr);
> +        }
>      }
>      if (env->mcg_cap) {
>          int i;
> @@ -1247,6 +1252,9 @@ static int kvm_get_msrs(CPUX86State *env)
>      if (has_msr_async_pf_en) {
>          msrs[n++].index = MSR_KVM_ASYNC_PF_EN;
>      }
> +    if (has_msr_pv_unhalt) {
> +        msrs[n++].index = MSR_KVM_PV_UNHALT;
> +    }
>  
>      if (env->mcg_cap) {
>          msrs[n++].index = MSR_MCG_STATUS;
> @@ -1326,6 +1334,9 @@ static int kvm_get_msrs(CPUX86State *env)
>          case MSR_KVM_ASYNC_PF_EN:
>              env->async_pf_en_msr = msrs[i].data;
>              break;
> +        case MSR_KVM_PV_UNHALT:
> +            env->pv_unhalt_msr = msrs[i].data;
> +            break;
>          }
>      }
>  
> 

Jan

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