From mboxrd@z Thu Jan 1 00:00:00 1970 From: Xiao Guangrong Subject: Re: [PATCH v3 4/9] KVM: MMU: introduce SPTE_ALLOW_WRITE bit Date: Sat, 21 Apr 2012 14:55:49 +0800 Message-ID: <4F9259F5.2060806@gmail.com> References: <4F911B74.4040305@linux.vnet.ibm.com> <4F911BE7.30206@linux.vnet.ibm.com> <20120420213925.GB13817@amt.cnet> <4F9229EF.4010506@gmail.com> <20120421042208.GB2763@amt.cnet> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Cc: Xiao Guangrong , Avi Kivity , LKML , KVM To: Marcelo Tosatti Return-path: In-Reply-To: <20120421042208.GB2763@amt.cnet> Sender: linux-kernel-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On 04/21/2012 12:22 PM, Marcelo Tosatti wrote: > On Sat, Apr 21, 2012 at 11:30:55AM +0800, Xiao Guangrong wrote: >> On 04/21/2012 05:39 AM, Marcelo Tosatti wrote: >> >> >>>> @@ -1177,9 +1178,8 @@ static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp, >>>> new_spte = *sptep & ~PT64_BASE_ADDR_MASK; >>>> new_spte |= (u64)new_pfn << PAGE_SHIFT; >>>> >>>> - new_spte &= ~PT_WRITABLE_MASK; >>>> - new_spte &= ~SPTE_HOST_WRITEABLE; >>>> - new_spte &= ~shadow_accessed_mask; >>>> + new_spte &= ~(PT_WRITABLE_MASK | SPTE_HOST_WRITEABLE | >>>> + shadow_accessed_mask | SPTE_ALLOW_WRITE); >>> >>> Each bit should have a distinct meaning. Here the host pte is being >>> write-protected, which means only the SPTE_HOST_WRITEABLE bit >>> should be cleared. >> >> >> Hmm, it is no problem if SPTE_ALLOW_WRITE is not cleared. >> >> But the meaning of SPTE_ALLOW_WRITE will become strange: we will see a >> spte with spte.SPTE_ALLOW_WRITE = 1 (means the spte is writable on host >> and guest) and spte.SPTE_HOST_WRITEABLE = 0 (means the spte is read-only >> on host). > > You are combining gpte writable bit, and host pte writable bit (which > are separate and independent of each other) into one bit. > > SPTE_HOST_WRITEABLE already indicates whether the host pte is writable > or not. Okay, i will split the meaning in next version! Thank you, Marcelo!