From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64DE8C77B75 for ; Tue, 18 Apr 2023 03:28:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230045AbjDRD2W (ORCPT ); Mon, 17 Apr 2023 23:28:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53310 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230135AbjDRD2U (ORCPT ); Mon, 17 Apr 2023 23:28:20 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9A73C2694 for ; Mon, 17 Apr 2023 20:28:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1681788496; x=1713324496; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=amLvuU5SwHOFGW7cS9olvKpAJQZO4PnOR3B4FYLLucU=; b=fh2IREwDS5pIhKRkKJ5BA3Z7NcDGt6l6qZ0qBn1YTIGcDa/tgyFGMzKq OVVKssOq5gYy3Uo3u55Nndbn4IJW2bHefd8xrICULjWnPMB8OMlkk7gB+ bRvj3XMGadB1tpVdD1FLsg6eNR1WPlmm+zheUPipqyHlj4kslOVeD4y4N w3syr/HzWrBGI6VsJplTvtSe5mdO4m0DOSY+MXxEqiiO30VPwfqsSKden 2ZgsykmjKF9biXMRxjtLUWBlo3BzZD69aRO3w7hvxBRqW3P0j7gxi456u K0jk/Qi6LbF6KFa/n+AGjGFZoogc5JNXWURSc69KVw8lPmGdNHp2w29Wl Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10683"; a="342558766" X-IronPort-AV: E=Sophos;i="5.99,206,1677571200"; d="scan'208";a="342558766" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2023 20:28:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10683"; a="668337875" X-IronPort-AV: E=Sophos;i="5.99,206,1677571200"; d="scan'208";a="668337875" Received: from zengguan-mobl1.ccr.corp.intel.com (HELO [10.238.0.183]) ([10.238.0.183]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2023 20:28:13 -0700 Message-ID: <4d9ea8b5-1299-4b3f-9cdc-f19116ad2ef6@intel.com> Date: Tue, 18 Apr 2023 11:28:05 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH v7 4/5] KVM: x86: Untag address when LAM applicable Content-Language: en-US To: Binbin Wu , "kvm@vger.kernel.org" , "Christopherson,, Sean" , "pbonzini@redhat.com" Cc: "Huang, Kai" , "Gao, Chao" , "Guo, Xuelian" , "robert.hu@linux.intel.com" References: <20230404130923.27749-1-binbin.wu@linux.intel.com> <20230404130923.27749-5-binbin.wu@linux.intel.com> From: Zeng Guang In-Reply-To: <20230404130923.27749-5-binbin.wu@linux.intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On 4/4/2023 9:09 PM, Binbin Wu wrote: > Untag address for 64-bit memory/mmio operand in instruction emulations > and vmexit handlers when LAM is applicable. > > For instruction emulation, untag address in __linearize() before > canonical check. LAM doesn't apply to instruction fetch and invlpg, > use KVM_X86_UNTAG_ADDR_SKIP_LAM to skip LAM untag. > > For vmexit handlings related to 64-bit linear address: > - Cases need to untag address > Operand(s) of VMX instructions and INVPCID > Operand(s) of SGX ENCLS > Linear address in INVVPID descriptor. > - Cases LAM doesn't apply to (no change needed) > Operand of INVLPG > Linear address in INVPCID descriptor > > Co-developed-by: Robert Hoo > Signed-off-by: Robert Hoo > Signed-off-by: Binbin Wu > Tested-by: Xuelian Guo > --- > arch/x86/kvm/emulate.c | 23 ++++++++++++++++++----- > arch/x86/kvm/kvm_emulate.h | 2 ++ > arch/x86/kvm/vmx/nested.c | 4 ++++ > arch/x86/kvm/vmx/sgx.c | 1 + > arch/x86/kvm/x86.c | 10 ++++++++++ > 5 files changed, 35 insertions(+), 5 deletions(-) > > diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c > index a20bec931764..b7df465eccf2 100644 > --- a/arch/x86/kvm/emulate.c > +++ b/arch/x86/kvm/emulate.c > @@ -688,7 +688,8 @@ static __always_inline int __linearize(struct x86_emulate_ctxt *ctxt, > struct segmented_address addr, > unsigned *max_size, unsigned size, > bool write, bool fetch, > - enum x86emul_mode mode, ulong *linear) > + enum x86emul_mode mode, ulong *linear, > + u64 untag_flags) IMO, here should be "u64 flags" instead of "u64 untag_flags". Emulator can use it as flag combination for other purpose. > { > struct desc_struct desc; > bool usable; > @@ -701,6 +702,7 @@ static __always_inline int __linearize(struct x86_emulate_ctxt *ctxt, > *max_size = 0; > switch (mode) { > case X86EMUL_MODE_PROT64: > + la = ctxt->ops->untag_addr(ctxt, la, untag_flags); > *linear = la; > va_bits = ctxt_virt_addr_bits(ctxt); > if (!__is_canonical_address(la, va_bits)) > @@ -758,7 +760,7 @@ static int linearize(struct x86_emulate_ctxt *ctxt, > { > unsigned max_size; > return __linearize(ctxt, addr, &max_size, size, write, false, > - ctxt->mode, linear); > + ctxt->mode, linear, 0); > } > > static inline int assign_eip(struct x86_emulate_ctxt *ctxt, ulong dst) > @@ -771,7 +773,12 @@ static inline int assign_eip(struct x86_emulate_ctxt *ctxt, ulong dst) > > if (ctxt->op_bytes != sizeof(unsigned long)) > addr.ea = dst & ((1UL << (ctxt->op_bytes << 3)) - 1); > - rc = __linearize(ctxt, addr, &max_size, 1, false, true, ctxt->mode, &linear); > + /* > + * LAM does not apply to addresses used for instruction fetches > + * or to those that specify the targets of jump and call instructions > + */ This api handles the target address of branch and call instructions. I think it enough to only explain the exact case. > + rc = __linearize(ctxt, addr, &max_size, 1, false, true, ctxt->mode, > + &linear, KVM_X86_UNTAG_ADDR_SKIP_LAM); > if (rc == X86EMUL_CONTINUE) > ctxt->_eip = addr.ea; > return rc; > @@ -906,9 +913,12 @@ static int __do_insn_fetch_bytes(struct x86_emulate_ctxt *ctxt, int op_size) > * __linearize is called with size 0 so that it does not do any > * boundary check itself. Instead, we use max_size to check > * against op_size. > + * > + * LAM does not apply to addresses used for instruction fetches > + * or to those that specify the targets of jump and call instructions Ditto. > */ > rc = __linearize(ctxt, addr, &max_size, 0, false, true, ctxt->mode, > - &linear); > + &linear, KVM_X86_UNTAG_ADDR_SKIP_LAM); > if (unlikely(rc != X86EMUL_CONTINUE)) > return rc; > >